M74HC166RM13TR ,8 BIT PISO SHIFT REGISTERM74HC1668 BIT PISO SHIFT REGISTER ■ HIGH SPEED : f ..
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M74HC173RM13TR ,QUAD D-TYPE REGISTER (3-STATE)Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
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M74HC174RM13TR ,HEX D-TYPE FLIP FLOP WITH CLEARAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
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MAX132EWG ,18-Bit ADC with Serial InterfaceGeneral Description ________
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M74HC166RM13TR
8 BIT PISO SHIFT REGISTER
1/12July 2001 HIGH SPEED :
fMAX = 63 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION:
ICC =4μA(MAX.) at TA=25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:OH | = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 166
DESCRIPTIONThe M74HC166 is an high speed CMOS 8 BIT
PISO SHIFT REGISTER fabricated with silicon
gate C2 MOS technology.
It consists of parallel or serial inputs and a
serial-out 8 bit shift register with gated clock inputs
and an overriding clear input. The parallel-in or
serial-in modes are controlled by the SHIFT/
LOAD input. When the SHIFT/LOAD input is held
high, the serial data input is enabled and the eight
flip-flops perform serial shifting with each clock
pulse; when held low, the parallel data inputs are
enabled and synchronous loading occurs on the
next clock pulse. Clocking is accomplished on the
low-to-high level edge of the clock pulse. The
CLOCK-INHIBIT input should be changed to the
high only while the clock input is held high. A direct
clear input overrides all other inputs, including the
clock, and sets all flip-flops to zero. Functional
details are shown in the truth table and the timing
chart. All inputs are equipped with protection
circuits against static discharge and transient
excess voltage.
M74HC1668 BIT PISO SHIFT REGISTER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC1662/12
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
a........h : The level of steady input voltage at inputs a through H respectively
M74HC1663/12
LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays
TIMING CHART
M74HC1664/12
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
M74HC1665/12
DC SPECIFICATIONS
M74HC1666/12
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
