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M74HC164OKIN/a110avai8 BIT SIPO SHIFT REGISTER


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M74HC164
8 BIT SIPO SHIFT REGISTER
1/13June 2003 HIGH SPEED:
fMAX= 62MHz (TYP.)at VCC =6V LOW POWER DISSIPATION:CC =4μA(MAX.)atTA =25°C HIGH NOISE IMMUNITY:NIH =VNIL =28%VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|= IOL =4mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH≅ tPHL WIDE OPERATING VOLTAGE RANGE:CC (OPR)= 2Vto 6V PIN AND FUNCTION COMPATIBLE WITH SERIES 164
DESCRIPTION

The M74HC164is an high speed CMOS8 BIT
SIPO SHIFT REGISTER fabricated with silicon
gateC2 MOS technology.
The M74HC164isan8bit shift register with serial
data entry and an output from eachof the eight
stages. Datais entered serially through oneof two
inputs(Aor B), eitherof these inputs canbe usedan active high enablefor data entry through the
other input. An unused input mustbe high,or both
inputs connected together. Each low-to-high
transitionon the clock inputs shifts data one place the right and enters into QA the logic NANDof
the two data inputs(Ax B), the data that existed
before the rising clock edge.A low level on the
clear input overridesall other inputs and clears the
register asynchronously, forcingallQ outputs low.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC164
BIT SIPO SHIFT REGISTER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC164
2/13
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
: Don’t Care
QAn- QGn: The levelofQA- QG, respectively. beforethe most-recent transitionofthe clock
LOGIC DIAGRAM

This logic diagramhasnotbe usedto estimate propagation delays
M74HC164
3/13
TIMING CHART
ABSOLUTE MAXIMUM RATINGS

AbsoluteMaximum Ratingsare those values beyond which damagetothe device mayoccur.Functional operation under these conditionsis
not implied
(*) 500mWat65°C; derateto 300mWby 10mW/°Cfrom 65°Cto85°C
M74HC164
4/13
RECOMMENDED OPERATING CONDITIONS SPECIFICATIONS
M74HC164
5/13 ELECTRICAL CHARACTERISTICS(CL=50 pF, Inputtr=tf =6ns)
CAPACITIVE CHARACTERISTICS
CPD isdefinedasthe valueofthe IC’s internal equivalent capacitance whichis calculatedfrom theoperating current consumption without
load. (Referto Test Circuit). Average operating currentcanbe obtainedbythe following equation. ICC(opr) =CPD xVCC xfIN +ICC
M74HC164
6/13
TEST CIRCUIT
= 50pFor equivalent (includesjig and probe capacitance) =ZOUTof pulse generator (typically 50Ω)
WAVEFORM1: MINIMUM PULSE WIDTH (CLEAR), MINIMUM REMOVAL TIME (CLEAR TO CLOCK)

(f=1MHz; 50% duty cycle)
M74HC164
7/13
WAVEFORM2: PROPAGATION DELAY TIMES, MINIMUM PULSE WIDTH (CLOCK), SETUP AND
HOLD TIME (A,B TO CLOCK)
(f=1MHz; 50% duty cycle)
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