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M74HC137M1RSTN/a159avai3 TO 8 LINE DECODER/LATCH (INVERTING)


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M74HC137M1R
3 TO 8 LINE DECODER/LATCH (INVERTING)
1/11August 2001 HIGH SPEED:
tPD =18ns (TYP.) at VCC = 6V LOW POWER DISSIPATION:
ICC = 2μA(MAX.) at TA=25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:OH | = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: PLH ≅ t PHL WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 137
DESCRIPTION

The M74HC137 is an high speed CMOS 3 TO 8
LINE DECODER/LATCH (INVERTING) fabricated
with silicon gate C2 MOS technology.
This device is a 3 to 8 line decoder with latches on
the three address inputs. When GL goes from low
to high, the addresses present at the select inputs
(A, B, and C) is stored in the latches. As long as
GL remains high no address changes will be
recognized. Output enable pins G1 and G2,
control the state of the outputs independently of
the select or latch-enable inputs. All the outputs
are high unless G1 is high and G2 is low. The
74HC137 is ideally suited for the implementation
of glitch-free decoders in stored-address
application in bus oriented systems.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC137

3 TO 8 LINE DECODER/LATCH (INVERTING)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC137
2/11
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
M74HC137
3/11
LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
M74HC137
4/11
RECOMMENDED OPERATING CONDITIONS
DC SPECIFICATIONS
M74HC137
5/11
AC ELECTRICAL CHARACTERISTICS (C
L = 50 pF, Input tr = tf = 6ns)
CAPACITIVE CHARACTERISTICS

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
M74HC137
6/11
TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM 1 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
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