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M27W201-80B6 |M27W20180B6STN/a11520avai2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
M27W201-80F6 |M27W20180F6STN/a6000avai2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
M27W20180K6STN/a1450avai2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
M27W201-80K6 |M27W20180K6STN/a350avai2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM


M27W201-80B6 ,2 MBIT (256KB X8) LOW VOLTAGE OTP EPROMLogic Diagramprogram storage and is organised as 262,144 by 8bits.V VCC PPThe M27W201 operates in t ..
M27W201-80F6 ,2 MBIT (256KB X8) LOW VOLTAGE OTP EPROMAbsolute Maximum Ratings" maycause permanent damage to the device. These are stress ratings only an ..
M27W20180K6 ,2 MBIT (256KB X8) LOW VOLTAGE OTP EPROMM27W2012 Mbit (256Kb x 8) Low Voltage UV EPROM and OTP EPROM■ 2.7V to 3.6V LOW VOLTAGE in READOPERA ..
M27W201-80K6 ,2 MBIT (256KB X8) LOW VOLTAGE OTP EPROMAbsolute Maximum RatingsSymbol Parameter Value Unit(3)T –40 to 125 °CA Ambient Operating Temperatur ..
M27W401 ,4 MBIT (512KB X8) LOW VOLTAGE UV EPROM AND OTP EPROM
M27W401-80B6 ,4 MBIT (512KB X8) LOW VOLTAGE UV EPROM AND OTP EPROM
M48T37Y-70MH6E ,3.3V-5V 256 KBIT (32KB X8) TIMEKEEPER SRAMLogic Diagram . . 4Table 1. Signal Names . . 4Figure 3. SOIC Connections . . . . ..
M48T512Y-70PM1 ,3.3V-5V 4 MB (512K X 8) TIMEKEEPER SRAMAbsolute Maximum Ratings . . . . . . . 14DC AND AC PARAMETERS . 15Table 7. Operating and ..
M48T559Y-MH1 ,64 Kbit 8Kb x8 TIMEKEEPER SRAM with ADDRESS/DATA MULTIPLEXEDAbsolute Maximum Ratings" may cause permanent damage to the device. This is a stressrating only and ..
M48T559Y-MH1TR ,64 Kbit 8Kb x8 TIMEKEEPER SRAM with ADDRESS/DATA MULTIPLEXEDLogic Diagram■ WRITE PROTECT VOLTAGE(V = Power-fail Deselect Voltage):PFD– M48T559Y: 4.2V ≤ V ≤ 4.5 ..
M48T58-70MH1 ,5.0V, 64 Kbit (8 Kb x 8) TIMEKEEPER SRAMAbsolute Maximum Ratings" may cause permanent damage to the device. This is astress rating only and ..
M48T58-70PC1 ,64 KBIT (8KB X 8) TIMEKEEPER SRAMLogic Diagram Table 1. Signal NamesV A0-A12 Address InputsCCDQ0-DQ7 Data Inputs / Outputs13 8Freque ..


M27W201-80B6-M27W201-80F6-M27W20180K6-M27W201-80K6
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
1/16October 2001
M27W201
Mbit (256Kbx 8) Low Voltage UV EPROM and OTP EPROM 2.7Vto 3.6V LOW VOLTAGEin READ
OPERATION ACCESS TIME:
–70nsat VCC =3.0Vto 3.6V
–80nsat VCC =2.7Vto 3.6V PIN COMPATIBLE with M27C2001 LOW POWER CONSUMPTION: 15μA max Standby Current 15mA max Active Currentat 5MHz PROGRAMMING TIME 100μs/byte HIGH RELIABILITY CMOS TECHNOLOGY 2,000V ESD Protection 200mA Latchup Protection Immunity ELECTRONIC SIGNATURE Manufacturer Code: 20h Device Code: 61h
DESCRIPTION

The M27W201isalow voltage2 Mbit EPROMof-
feredinthetwo rangeUV (ultra violet erase) and
OTP (one time programmable).Itis ideally suited
for microprocessor systems requiring large dataor
program storage andis organisedas 262,144by8
bits.
The M27W201 operatesinthe read mode witha
supply voltageaslowas 2.7Vat –40to 85°C tem-
perature range. The decreasein operating power
allows eithera reductionofthe sizeofthe batteryan increasein the time between batteryre-
charges.
The FDIP32W (window ceramic frit-seal package)
hasa transparentlid which allowsthe usertoex-
posethe chipto ultraviolet lightto erasethebit pat-
tern.A new pattern can thenbe writtento the
deviceby followingthe programming procedure.
For application wherethe contentis programmed
only one time and erasureis not required, the
M27W201is offeredin PDIP32, PLCC32 and
TSOP32(8x 20mm and8x 14mm) packages.
M27W201
2/16
Table1. Signal Names
3/16
M27W201
Table2. Absolute Maximum Ratings(1)

Note:1. Exceptforthe rating "Operating Temperature Range", stresses above those listedinthe Table "Absolute Maximum Ratings"may
cause permanent damagetothe device. Theseare stress ratingsonlyand operationofthe deviceat theseorany otherconditions
above those indicatedinthe Operating sectionsofthis specificationisnot implied. Exposureto Absolute Maximum Rating condi-
tions forextended periodsmay affect device reliability.Referalsotothe STMicroelectronics SUREProgramand otherrelevantqual-
ity documents. MinimumDC voltageon Inputor Outputis –0.5Vwith possible undershootto –2.0Vfora periodlessthan 20ns. MaximumDC
voltageon OutputisVCC +0.5V withpossibleovershoot toVCC+2Vfora periodlessthan 20ns. Dependson range.
Table3. Operating Modes

Note:X= VIHor VIL,VID=12V ±0.5V.
Table4. Electronic Signature
M27W201
4/16
DEVICE OPERATION

The operating modesofthe M27W201are listedin
the Operating Modes table.A single power supply requiredinthe read mode.All inputsare TTL
levels exceptfor VPP and 12VonA9for Electronic
Signature.
Read Mode

The M27W201 has two control functions, bothof
which mustbe logically activein orderto obtain
dataatthe outputs. Chip Enable(E)isthe power
control and shouldbe usedfor device selection.
Output Enable(G)isthe output control and should usedto gate datatothe output pins, indepen-
dentof device selection. Assuming thatthe ad-
dresses are stable, the address access time
(tAVQV)is equalto the delay fromEto output
(tELQV). Datais availableatthe output aftera delay tGLQV fromthe falling edgeofG, assuming that has beenlow andthe addresses have been sta-
bleforat least tAVQV-tGLQV.
Standby Mode

The M27W201 hasa standby mode which reduc-the supply current from 15mAto 15μA withlow
voltage operation VCC≤ 3.6V, see Read ModeDC
Characteristics tablefor details.The M27W201is
placedinthe standby modeby applyinga CMOS
high signalto theE input. Wheninthe standby
mode,the outputsareina high impedance state,
independentoftheG input.
Table5.AC Measurement Conditions
Table6. Capacitance(1)
(TA=25 °C,f=1 MHz)
Note:1. Sampledonly,not 100% tested.
5/16
M27W201
Table7. Read ModeDC Characteristics(1)

(TA= –40to85°C; VCC =2.7V to3.6V; VPP =VCC)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. MaximumDC voltageon OutputisVCC +0.5V.
System Considerations

The power switching characteristicsof Advanced
CMOS EPROMs require careful decouplingofthe
devices. The supply current, ICC, has three seg-
ments thatareof interesttothe system designer:
the standby current level,the active current level,
and transient current peaks thatare producedby
the falling and rising edgesofE. The magnitudeof
the transient current peaksis dependentonthe
capacitive and inductive loadingofthe deviceat
the output.
The associated transient voltage peaks canbe
suppressedby complying withthetwo line output
control andby properly selected decouplingca-
pacitors.Itis recommended thata 0.1μF ceramic
capacitorbe usedon every device between VCC
and VSS. This shouldbea high frequency capaci-
torof low inherent inductance and shouldbe
placedas closetothe deviceas possible.In addi-
tion,a 4.7μF bulk electrolytic capacitor shouldbe
used between VCC and VSSfor every eight devic-
es. The bulk capacitor shouldbe located nearthe
power supply connection point. The purposeofthe
bulk capacitoristo overcome the voltage drop
causedbythe inductive effectsof PCB traces.
Two Line Output Control

Because EPROMs are usually usedin larger
memory arrays,this product featuresa2line con-
trol function which accommodatesthe useof mul-
tiple memory connection. The two line control
function allows:the lowest possible memory power dissipation, complete assurance that output bus contention
willnot occur.
For the most efficient useof these two control
lines,E shouldbe decoded and usedasthe prima- device selecting function, whileG shouldbe
madea common connectiontoall devicesinthe
array and connectedto the READ line fromthe
system control bus. This ensures thatall deselect- memory devicesarein theirlow power standby
mode and that the output pins are only active
when datais required froma particular memory
device.
M27W201
6/16
Table8. Read ModeAC Characteristics(1)

(TA= –40to85°C; VCC =2.7V to3.6V; VPP =VCC)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested. Speed obtainedwithHigh SpeedAC measurement conditions.
7/16
M27W201
Table9. Programming ModeDC Characteristics(1)

(TA =25°C; VCC= 6.25V± 0.25V; VPP= 12.75V± 0.25V)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP.
Table10. Programming ModeAC Characteristics(1)

(TA =25°C; VCC= 6.25V± 0.25V; VPP= 12.75V± 0.25V)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested.
ming '0's intothe desiredbit locations. Although
only'0'swillbe programmed, both'1's and'0'scan presentin the data word. The only wayto
changea‘0’toa‘1’isbydie exposureto ultraviolet
light (UV EPROM). The M27W201isinthe pro-
gramming mode when VPP inputisat 12.75V,EisVIL andPis pulsedtoVIL. The datatobepro-
grammedis appliedto8bitsin paralleltothe data
output pins. The levels requiredforthe address
and data inputsare TTL. VCCis specifiedtobe
6.25V± 0.25V.
Programming

The M27W201has been designedtobe fully com-
patible withthe M27C2001 andhasthe same elec-
tronic signature.Asa resultthe M27W201 canbe
programmedasthe M27C2001onthe same pro-
gramming equipment applying 12.75Von VPPand
6.25Von VCCbythe useofthe same PRESTOII
algorithm.
When delivered (and after each‘1’s erasureforUV
EPROM),all bitsofthe M27W201 areinthe'1'
state.Datais introducedby selectively program-
M27W201
8/16
PRESTOII Programming Algorithm

PRESTOII Programming Algorithm allows the
whole arraytobe programmed witha guaranteed
margin,ina typical timeof 26.5 seconds. Pro-
gramming with PRESTOII consistsof applyinga
sequenceof 100μs program pulsesto each byte
untila correct verify occurs (see Figure7). During
programming and verify operation,a MARGIN
MODE circuitis automatically activatedin orderto
guarantee that each cellis programmed with
enough margin.No overprogram pulseis applied
sincethe verifyin MARGIN MODEat VCC much
higher than 3.6V, providesthe necessary margin each programmed cell.
Program Inhibit

Programmingof multiple M27W201sin parallel
with different datais also easily accomplished.Ex-
ceptforE,alllike inputs includingGofthe parallel
M27W201 maybe common.A TTLlow level pulse
appliedtoa M27W201'sP input, withE low and
VPPat 12.75V,will program that M27W201.A high
levelE input inhibitsthe other M27W201s frombe-
ing programmed.
Program Verify
verify (read) shouldbe performedonthe pro-
grammedbitsto determine that they were correct- programmed. The verifyis accomplished withE
andGat VIL,Pat VIH,VPPat 12.75V and VCCat
6.25V.
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