M27C800-90F1 ,8 MBIT (1MB X8 OR 512KB X16) UV EPROM AND OTP EPROMapplications where the content is programmedonly one time and erasure is not required, theGM27C800 ..
M27C801-100B1 ,8 MBIT (1MB X 8) UV EPROM AND OTP EPROMM27C8018 Mbit (1Mb x 8) UV EPROM and OTP EPROM■ 5V ± 10% SUPPLY VOLTAGE in READ OPERATION■ ACCESS T ..
M27C801-100F1 ,8 MBIT (1MB X 8) UV EPROM AND OTP EPROMM27C8018 Mbit (1Mb x 8) UV EPROM and OTP EPROM■ 5V ± 10% SUPPLY VOLTAGE in READ OPERATION■ ACCESS T ..
M27C801-100F6 ,8 MBIT (1MB X 8) UV EPROM AND OTP EPROMapplications where the content is programmed20 8only one time and erasure is not required, theM27C8 ..
M27C801-120F1 ,8 MBIT (1MB X 8) UV EPROM AND OTP EPROMM27C8018 Mbit (1Mb x 8) UV EPROM and OTP EPROM■ 5V ± 10% SUPPLY VOLTAGE in READ OPERATION■ ACCESS T ..
M27C801-55F1 , 8 Mbit (1Mb x 8) UV EPROM and OTP EPROM
M48T02-70PC1 ,16 KBIT (2KB X8) TIMEKEEPER SRAMM48T02M48T12® 5.0V, 16 Kbit (2Kb x8) TIMEKEEPER SRAM
M48T08-100PC1 ,64K (8K X 8) TIMEKEEPER SRAMBlock Diagram . . 5OPERATION MODES . . . . . . . 6Table 2. Operating Modes 6RE ..
M48T08-150PC1 ,64K (8K X 8) TIMEKEEPER SRAMLogic Diagram Table 1. Signal NamesA0-A12 Address InputsVCCDQ0-DQ7 Data Inputs / Outputs13 8INT Pow ..
M48T08Y-10MH1 ,64K (8K X 8) TIMEKEEPER SRAMLogic Diagram Table 1. Signal NamesA0-A12 Address InputsVCCDQ0-DQ7 Data Inputs / Outputs13 8INT Pow ..
M48T08Y-10MH1E ,64K (8K X 8) TIMEKEEPER SRAMM48T08M48T08Y, M48T18® 5V, 64 Kbit (8 Kb x8) TIMEKEEPER SRAM
M48T12-150PC1 ,16 KBIT (2KB X8) TIMEKEEPER SRAMLogic Diagram . . 4Table 1. Signal Names . . 4Figure 3. DIP Connections 4Figur ..
M27C800-90F1
8 MBIT (1MB X8 OR 512KB X16) UV EPROM AND OTP EPROM
1/18December 2001
M27C800 Mbit (1Mb x8 or 512Kb x16) UV EPROM and OTP EPROM5V± 10% SUPPLY VOLTAGEin READ
OPERATION ACCESS TIME: 50ns BYTE-WIDEor WORD-WIDE
CONFIGURABLE8 Mbit MASK ROM REPLACEMENT LOW POWER CONSUMPTION Active Current 70mAat 8MHz Stand-by Current 50μA PROGRAMMING VOLTAGE: 12.5V± 0.25V PROGRAMMING TIME: 50μs/word ELECTRONIC SIGNATURE Manufacturer Code: 20h Device Code: B2h
DESCRIPTIONThe M27C800isan8 Mbit EPROM offeredinthe
two rangesUV (ultra violet erase) and OTP (one
time programmable).Itis ideally suitedfor micro-
processor systems requiring large dataor program
storage.Itis organisedas either1 Mwordsof8bit 512 Kwordsof16bit. The pin-outis compatible
withthe most common8 Mbit Mask ROM.
The FDIP42W (window ceramic frit-seal package)
hasa transparentlid which allowsthe usertoex-
posethe chipto ultraviolet lightto erasethebit pat-
tern. new patterncan thenbe written rapidlytothede-
viceby followingthe programming procedure.
For applications wherethe contentis programmed
only one time and erasureis not required, the
M27C800is offeredin PDIP42, PLCC44 and
SO44 packages.
M27C8002/18
Table1. Signal Names
3/18
M27C800
Table2. Absolute Maximum Ratings(1)Note:1. Exceptforthe rating "Operating Temperature Range", stresses above those listedinthe Table "Absolute Maximum Ratings"may
cause permanent damagetothe device. Theseare stress ratingsonlyand operationofthe deviceat theseorany otherconditions
above those indicatedinthe Operating sectionsofthis specificationisnot implied. Exposureto Absolute Maximum Rating condi-
tions forextended periodsmay affect device reliability.Referalsotothe STMicroelectronics SUREProgramand otherrelevantqual-
ity documents. MinimumDC voltageon Inputor Outputis –0.5Vwith possible undershootto –2.0Vfora periodlessthan 20ns. MaximumDC
voltageon OutputisVCC +0.5V withpossibleovershoot toVCC+2Vfora periodlessthan 20ns. Dependson range.
Table3. Operating ModesNote:X= VIHor VIL,VID=12V ±0.5V.
Table4. Electronic Signature
M27C8004/18
DEVICE OPERATIONThe operating modesofthe M27C800are listedin
the Operating Modes Table.A single power supply requiredinthe read mode.All inputsare TTL
compatible exceptfor VPP and 12VonA9forthe
Electronic Signature.
Read ModeThe M27C800 has two organisations, Word-wide
and Byte-wide. The organisationis selectedbythe
signal levelonthe BYTEVPP pin. When BYTEVPPat VIHthe Word-wide organisationis selected
andthe Q15A–1pinis usedfor Q15 Data Output.
Whenthe BYTEVPPpinisatVILthe Byte-wideor-
ganisationis selected andthe Q15A–1pinis used
forthe Address Input A–1. Whenthe memoryis
logically regardedas16bit wide,but readinthe
Byte-wide organisation, then with A–1atVILthe
lower8bitsofthe16bit dataare selected and with
A–1atVIHthe upper8 bitsofthe16bit dataare
selected.
The M27C800 has two control functions, bothof
which mustbe logically activein orderto obtain
dataatthe outputs.In additionthe Word-wideor
Byte- wide organisation mustbe selected.
Chip Enable(E)isthe power controland shouldbe
usedfor device selection. Output Enable (G)isthe
output control and shouldbe usedto gate datato
the output pins independentof device selection.
Assuming thatthe addresses are stable,thead-
dress access time (tAVQV)is equalto the delay
fromEto output (tELQV). Datais availableatthe
output aftera delayof tGLQV fromthe falling edgeG, assuming thatE has beenlow andthead-
dresses have been stableforat least tAVQV-tGLQV.
Table5.AC Measurement Conditions
5/18
M27C800
Table7. Read ModeDC Characteristics(1)(TA=0to70°Cor –40to85°C; VCC=5V±5%or5V± 10%; VPP =VCC)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. MaximumDC voltageon OutputisVCC +0.5V.
Table6. Capacitance(1)(TA=25 °C,f=1 MHz)
Note:1. Sampledonly,not 100% tested.
Standby ModeThe M27C800 hasa standby mode which reduces
the supply current from 50mAto 100μA. The
M27C800is placedinthe standby modeby apply-
inga CMOS high signaltotheE input. Wheninthe
standby mode,the outputs areina high imped-
ance state, independentoftheG input.
M27C8006/18
Table8A. Read ModeAC Characteristics(1)(TA=0to70°Cor –40to85°C; VCC=5V±5%or5V± 10%; VPP =VCC)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested. Speed obtainedwithHigh SpeedAC measurement conditions.
Table8B. Read ModeAC Characteristics(1)(TA=0to70°Cor –40to85°C; VCC=5V±5%or5V± 10%; VPP =VCC)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested.
7/18
M27C800
Two Line Output ControlBecause EPROMs are usually usedin larger
memory arrays,this product featuresa 2-line con-
trol function which accommodatesthe useof mul-
tiple memory connection. The two-line control
function allows:the lowest possible memory power dissipation complete assurance that output bus contention
willnot occur.
For the most efficient useof these two control
lines,E shouldbe decoded and usedasthe prima- device selecting function, whileG shouldbe
madea common connectiontoall devicesinthe
array and connectedto the READ line fromthe
system control bus. This ensures thatall deselect- memory devicesarein theirlow power standby
mode and that the output pins are only active
when datais required froma particular memory
device.
System ConsiderationsThe power switching characteristicsof Advanced
CMOS EPROMs require careful decouplingofthe
suppliesto the devices. The supply current ICC
has three segmentsof importancetothe system
designer:the standby current,the active current
andthe transient peaks thatare producedbythe
falling and rising edgesofE.
The magnitudeofthe transient current peaksis
dependentonthe capacitive and inductive loading the device outputs. The associated transient
voltage peaks canbe suppressedby complying
withthetwoline output control andby properlyse-
lected decoupling capacitors.Itis recommended
thata 0.1μF ceramic capacitoris usedon every
device between VCC and VSS.
This shouldbea high frequency typeoflow inher-
ent inductance and shouldbe placedas closeas
possibletothe device.In addition,a 4.7μF electro-
lytic capacitor shouldbe used between VCC and
VSSfor every eight devices. This capacitor should mounted near the power supply connection
point. The purposeofthis capacitoristo overcome
the voltage drop causedbythe inductive effectsof
PCB traces.
M27C8008/18
9/18
M27C800
Table9. Programming ModeDC Characteristics(1)(TA =25°C; VCC= 6.25V± 0.25V; VPP= 12.5V± 0.25V)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP.
Table10. Programming ModeAC Characteristics(1)(TA =25°C; VCC= 6.25V± 0.25V; VPP= 12.5V± 0.25V)
Note:1.VCCmustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested.
ProgrammingWhen delivered (and after each erasureforUV
EPROM),all bitsofthe M27C800 areinthe'1'
state. Datais introducedby selectively program-
ming '0's intothe desiredbit locations. Although
only'0'swillbe programmed, both'1's and'0'scan presentin the data word. The only wayto
changea'0'toa'1'isbydie expositionto ultravio-
let light (UVEPROM). The M27C800isinthe pro-
gramming mode when VPP inputisat 12.5V,GisVIH andEis pulsedto VIL. The datatobepro-
grammedis appliedto16bitsin paralleltothe data
output pins. The levels requiredforthe address
and data inputsare TTL. VCCis specifiedtobe
6.25V± 0.25V.
