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M27C64A-10F1 |M27C64A10F1STN/a6100avai64 KBIT (8KB X8) UV EPROM AND OTP ROM


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M27C64A-10F1
64 KBIT (8KB X8) UV EPROM AND OTP ROM
1/14October 2002
M27C64A

64 Kbit (8Kb x8) UV EPROM and OTP EPROM 5V ± 10% SUPPLY VOLTAGE in READ
OPERATION ACCESS TIME: 100ns LOW POWER “CMOS” CONSUMPTION: Active Current 30mA Standby Current 100μA PROGRAMMING VOLTAGE: 12.5V ± 0.25V HIGH SPEED PROGRAMMING
(less than 1 minute) ELECTRONIC SIGNATURE Manufacturer Code: 9Bh Device Code: 08h
DESCRIPTION

The M27C64A is a 64Kbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for micro-
processor systems requiring large programs and
is organized as 8,192 by 8 bits.
The FDIP28W (window ceramic frit-seal package)
has transparent lid which allows the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only on time and erasure is not required, the
M27C64A is offered in PLCC32 package.
Figure 1. Logic Diagram
M27C64A
Figure 2B. Pin Connections
Figure 2A. DIP Connections
Table 1. Signal Names
DEVICE OPERATION

The modes of operation of the M27C64A are listed
in the Operating Modes table. A single power sup-
ply is required in the read mode. All inputs are TTL
levels except for VPP and 12V on A9 for Electronic
Signature.
Read Mode

The M27C64A has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
dresses are stable, the address access time
(tAVQV) is equal to the delay from E to output
(tELQV). Data is available at the output after a delay
of tGLQV from the falling edge of G, assuming that
E has been low and the addresses have been sta-
ble for at least tAVQV-tGLQV.
3/14
M27C64A
Table 2. Absolute Maximum Ratings (1)

Note:1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. Depends on range.
Table 3. Operating Modes

Note: X = VIH or VIL, VID = 12V ± 0.5V.
Table 4. Electronic Signature
M27C64A
Standby Mode

The M27C64A has a standby mode which reduces
the active current from 30mA to 100μA. The
M27C64A is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high imped-
ance state, independent of the G input.
Two Line Output Control

Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows: the lowest possible memory power dissipation, complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
Table 5. AC Measurement Conditions

Note that Output Hi-Z is defined as the point where data
is no longer driven.
Figure 3. AC Testing Input Output Waveform
Figure 4. AC Testing Load Circuit
Table 6. Capacitance (1)
(TA = 25 °C, f = 1 MHz)
Note:1. Sampled only, not 100% tested.
5/14
M27C64A
Table 7. Read Mode DC Characteristics (1)

(TA = 0 to 70 °C or –40 to 85 °C: VCC = 5V ± 10%; VPP = VCC)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Maximum DC voltage on Output is VCC +0.5V.
output control and by properly selected decoupling
capacitors. It is recommended that a 0.1μF ceram-
ic capacitor be used on every device between VCC
and VSS. This should be a high frequency capaci-
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7μF bulk electrolytic capacitor should be
used between VCC and VSS for every eight devic-
es. The bulk capacitor should be located near the
power supply connection point. The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
System Considerations

The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associated transient voltage peaks
can be suppressed by complying with the two line
M27C64A
Table 8. Read Mode AC Characteristics (1)

(TA = 0 to 70 °C or –40 to 85 °C: VCC = 5V ± 10%; VPP = VCC)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Sampled only, not 100% tested.
Table 9. Read Mode AC Characteristics (1)

(TA = 0 to 70 °C or –40 to 85 °C: VCC = 5V ± 10%; VPP = VCC)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Sampled only, not 100% tested.
7/14
M27C64A
Figure 5. Read Mode AC Waveforms
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