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M27C4002-10B1-M27C4002-10C1-M27C4002-10F1-M27C4002-10F1..-M27C4002-10F6 Fast Delivery,Good Price
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M27C4002-10B1 |M27C400210B1STMN/a10000avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002-10B1 |M27C400210B1ST,STN/a10000avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002-10C1 |M27C400210C1STN/a2005avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002-10F1 |M27C400210F1ST ?N/a1avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002-10F1.. |M27C400210F1STN/a15avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002-10F6 |M27C400210F6STN/a1020avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002--10F6 |M27C400210F6STN/a49avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C400212C1STN/a60avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002-12C1 |M27C400212C1STN/a196avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002-12C6 |M27C400212C6STN/a351avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002-12F1 |M27C400212F1N/a4601avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C400245XF1STN/a6100avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002-45XF1 |M27C400245XF1STMN/a5220avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002-45XF1 |M27C400245XF1STN/a5704avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002-70C1 |M27C400270C1STN/a68avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002-80C6 |M27C400280C6STN/a486avai4 MBIT (256KB X16) UV EPROM AND OTP ROM
M27C4002-80XF1 |M27C400280XF1N/a37avai4 MBIT (256KB X16) UV EPROM AND OTP ROM


M27C4002-10B1 ,4 MBIT (256KB X16) UV EPROM AND OTP ROMAbsolute Maximum RatingsSymbol Parameter Value Unit(3)T –40 to 125 °CA Ambient Operating Temperatur ..
M27C4002-10C1 ,4 MBIT (256KB X16) UV EPROM AND OTP ROMM27C40024 Mbit (256Kb x16) UV EPROM and OTP EPROM■ 5V ± 10% SUPPLY VOLTAGE in READOPERATION■ ACCESS ..
M27C4002-10F1 ,4 MBIT (256KB X16) UV EPROM AND OTP ROMM27C40024 Mbit (256Kb x16) UV EPROM and OTP EPROM■ 5V ± 10% SUPPLY VOLTAGE in READOPERATION■ ACCESS ..
M27C4002-10F1.. ,4 MBIT (256KB X16) UV EPROM AND OTP ROMAbsolute Maximum RatingsSymbol Parameter Value Unit(3)T –40 to 125 °CA Ambient Operating Temperatur ..
M27C4002-10F6 ,4 MBIT (256KB X16) UV EPROM AND OTP ROMLogic Diagrampose the chip to ultraviolet light to erase the bit pat-tern. A new pattern can then b ..
M27C4002--10F6 ,4 MBIT (256KB X16) UV EPROM AND OTP ROMAbsolute Maximum Ratings" maycause permanent damage to the device. These are stress ratings only an ..
M45026 , 145026 COMPATIBLE 3 STATE 19,683 CODES
M45PE10VMN6 ,1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus InterfaceFEATURES . . . . 7Sharing the Overhead of Modifying Data . . . 7An Easy Way to Modify D ..
M45PE10-VMN6G ,1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus InterfaceFEATURES SUMMARY . . . . . 1SUMMARY DESCRIPTION . . . 4SIGNAL DESCRIPTION . . . ..
M45PE10VMN6P ,1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus InterfaceFEATURES SUMMARY■ 1Mbit of Page-Erasable Flash Memory Figure 1. Packages■ Page Write (up to 256 Byt ..
M45PE10-VMN6P ,1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus InterfaceFEATURES SUMMARY . . . . . 1Figure 1. Packages . . . . . . 1SUMMARY DESCRIPTION ..
M45PE10-VMN6TG ,1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus InterfaceFEATURES SUMMARY■ 1Mbit of Page-Erasable Flash Memory Figure 1. Packages■ Page Write (up to 256 Byt ..


M27C4002-10B1-M27C4002-10C1-M27C4002-10F1-M27C4002-10F1..-M27C4002-10F6-M27C4002--10F6-M27C400212C1-M27C4002-12C1-M27C4002-12C6-M27C4002-12F1-M27C400245XF1-M27C4002-45XF1-M27C4002-70C1-M27C4002-80C6-M27C4002-80XF1
4 MBIT (256KB X16) UV EPROM AND OTP ROM
1/18August 2001
M27C4002
Mbit (256Kb x16) UV EPROM and OTP EPROM5V± 10% SUPPLY VOLTAGEin READ
OPERATION ACCESS TIME: 45ns LOW POWER CONSUMPTION: Active Current 70mAat 10MHz Standby Current 100μA PROGRAMMING VOLTAGE: 12.75V± 0.25V PROGRAMMING TIME: 100μs/word ELECTRONIC SIGNATURE Manufacturer Code: 20h Device Code: 44h
DESCRIPTION

The M27C4002isa4 Mbit EPROM offeredinthe
two rangesUV (ultra violet erase) and OTP (one
time programmable).Itis ideally suitedfor micro-
processor systems requiring large programs and organisedas 262,144 wordsof16 bits.
The FDIP40W (window ceramic frit-seal package)
andthe JLCC44W (J-lead chip carrier packages)
have transparent lids which allowthe usertoex-
posethe chipto ultraviolet lightto erasethebit pat-
tern.A new pattern can thenbe writtento the
deviceby followingthe programming procedure.
For applications wherethe contentis programmed
only one time and erasureis not required, the
M27C4002is offeredin PDIP40, PLCC44 and
TSOP40(10x20 mm) packages.
M27C4002
2/18
Table1. Signal Names
3/18
M27C4002
Table2. Absolute Maximum Ratings(1)

Note:1. Exceptforthe rating "Operating Temperature Range", stresses above those listedinthe Table "Absolute Maximum Ratings"may
cause permanent damagetothe device. Theseare stress ratingsonlyand operationofthe deviceat theseorany otherconditions
above those indicatedinthe Operating sectionsofthis specificationisnot implied. Exposureto Absolute Maximum Rating condi-
tions forextended periodsmay affect device reliability.Referalsotothe STMicroelectronics SUREProgramand otherrelevantqual-
ity documents. MinimumDC voltageon Inputor Outputis –0.5Vwith possible undershootto –2.0Vfora periodlessthan 20ns. MaximumDC
voltageon OutputisVCC +0.5V withpossibleovershoot toVCC+2Vfora periodlessthan 20ns. Dependson range.
Table3. Operating Modes

Note:X= VIHor VIL,VID=12V ±0.5V.
Table4. Electronic Signature

Note: Outputs Q15-Q8aresetto'0'.
DEVICE OPERATION

The operating modesofthe M27C4002are listedthe Operating Modes table.A single power sup-
plyis requiredinthe read mode.All inputsare TTL
levels exceptfor VPP and 12VonA9for Electronic
Signature.
Read Mode

The M27C4002 hastwo control functions, bothof
which mustbe logically activein orderto obtain
dataatthe outputs. Chip Enable(E)isthe power
control and shouldbe usedfor device selection.
Output Enable(G)isthe output control and should usedto gate datatothe output pins, indepen-
dentof device selection. Assuming thatthe ad-
dresses are stable, the address access time
(tAVQV)is equalto the delay fromEto output
(tELQV). Datais availableatthe output aftera delay tGLQV fromthe falling edgeofG, assuming that has beenlow andthe addresses have been sta-
bleforat least tAVQV-tGLQV.
M27C4002
4/18
Standby Mode

The M27C4002 hasa standby mode which reduc-the supply current from 50mAto 100μA. The
M27C4002is placedinthe standby modebyap-
plyingaCMOS highsignal totheE input. Whenin
the standby mode,the outputsareina high imped-
ance state, independentoftheG input.
Two Line Output Control

Because EPROMs are usually usedin larger
memory arrays,the product featuresa2 line con-
trol function which accommodatesthe useof mul-
tiple memory connection. The two line control
function allows:the lowest possible memory power dissipation, complete assurance that output bus contention
willnot occur.
For the most efficient useof these two control
lines,E shouldbe decoded and usedasthe prima- device selecting function, whileG shouldbe
madea common connectiontoall devicesinthe
array and connectedto the READ line fromthe
system control bus. This ensures thatall deselect- memory devicesarein theirlow power standby
mode and that the output pins are only active
when datais required froma particular memory
device.
Table5.AC Measurement Conditions
Table6. Capacitance(1)
(TA=25 °C,f=1 MHz)
Note:1. Sampledonly,not 100% tested.
5/18
M27C4002
Table7. Read ModeDC Characteristics(1)

(TA=0to 70°Cor –40to 85°C; VCC=5V±5%or5V± 10%; VPP =VCC)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. MaximumDC voltageon OutputisVCC +0.5V.
Table8A. Read ModeAC Characteristics(1)

(TA=0to 70°Cor –40to 85°C; VCC=5V±5%or5V± 10%; VPP =VCC)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested. Speed obtainedwithHigh SpeedAC measurement conditions.
M27C4002
6/18
Table8B. Read ModeAC Characteristics(1)

(TA=0to 70°Cor –40to 85°C; VCC=5V±5%or5V± 10%; VPP =VCC)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested.
Table8C. Read ModeAC Characteristics(1)

(TA=0to 70°Cor –40to 85°C; VCC=5V±5%or5V± 10%; VPP =VCC)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested.
7/18
M27C4002
System Considerations

The power switching characteristicsof Advanced
CMOS EPROMs require careful decouplingofthe
devices. The supply current, ICC, has three seg-
ments thatareof interesttothe system designer:
the standby current level,the active current level,
and transient current peaks thatare producedby
the falling and rising edgesofE. The magnitudeof
the transient current peaksis dependentonthe
output capacitive and inductive loadingofthede-
vice. The associated transient voltage peaks can suppressedby complying withthetwoline out-
put control andby properly selected decoupling
capacitors.Itis recommended thata 0.1μF ceram- capacitorbe usedon every device between VCC
and VSS. This shouldbea high frequency capaci-
torof low inherent inductance and shouldbe
placedas closetothe deviceas possible.In addi-
tion,a 4.7μF bulk electrolytic capacitor shouldbe
used between VCC and VSSfor every eight devic-
es. The bulk capacitor shouldbe located nearthe
power supply connection point.The purposeofthe
bulk capacitoristo overcome the voltage drop
causedbythe inductive effectsof PCB traces.
M27C4002
8/18
Table9. Programming ModeAC Characteristics(1)

(TA =25°C; VCC= 6.25V± 0.25V; VPP= 12.75V± 0.25V)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP.
Table10. Programming ModeAC Characteristics(1)

(TA =25°C; VCC= 6.25V± 0.25V; VPP= 12.75V± 0.25V
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested.
Programming

When delivered (and after each erasureforUV
EPROM),all bitsofthe M27C4002 areinthe'1'
state. Datais introducedby selectively program-
ming '0's intothe desiredbit locations. Although
only'0'swillbe programmed, both'1's and'0'scan presentin the data word. The only wayto
changea'0'toa'1'isbydie exposureto ultraviolet
light (UV EPROM). The M27C4002isinthe pro-
gramming mode when VPP inputisat 12.75V,GisVIH andEis pulsedto VIL. The datatobepro-
grammedis appliedto16bitsin paralleltothe data
output pins. The levels requiredforthe address
and data inputsare TTL. VCCis specifiedtobe
6.25V± 0.25V.
9/18
M27C4002
PRESTOII Programming Algorithm

PRESTOII Programming Algorithm allows the
whole arraytobe programmed witha guaranteed
margin,ina typical timeof 26.5 seconds. Pro-
gramming with PRESTOII consistsof applyinga
sequenceof 100μs program pulsesto each byte
untila correct verify occurs (see Figure7). During
programming and verify operation,a MARGIN
MODE circuitis automatically activatedin orderto
guarantee that each cellis programmed with
enough margin.No overprogram pulseis applied
sincethe verifyin MARGIN MODE provides nec-
essary marginto each programmed cell.
Program Inhibit

Programmingof multiple M27C4002sin parallel
with different datais also easily accomplished.Ex-
ceptforE,alllike inputs includingGofthe parallel
M27C4002 maybe common.A TTL low level
pulse appliedtoa M27C4002'sE input, with VPP 12.75V,will program that M27C4002.A high
levelE input inhibitsthe other M27C4002s from
being programmed.
Program Verify
verify (read) shouldbe performedonthe pro-
grammedbitsto determine that they were correct- programmed. The verifyis accomplished withG VIL,Eat VIH,VPPat 12.75V and VCCat 6.25V.
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