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LSM303DLHCSTN/a50avaiUltra compact high performance e-compass: 3D accelerometer and 3D magnetometer module


LSM303DLHC ,Ultra compact high performance e-compass: 3D accelerometer and 3D magnetometer moduleAbsolute maximum ratings . . . . 142.6 Terminology . . . . . . . 152.6.1 Linear accelerat ..
LSM303DLHTR , Sensor module: 3-axis accelerometer and 3-axis magnetometer
LSM670 , Mini TOPLED
LSM670-J , Mini TOPLED
LSM670-J , Mini TOPLED
LSM676 , Hyper Mini TOPLED Hyper-Bright LED
LT1781CS ,Low Power 5V RS232 Dual Driver/Receiver with 15kV ESD Protection
LT1781CS ,Low Power 5V RS232 Dual Driver/Receiver with 15kV ESD Protection
LT1781CS#TR ,Low Power 5V RS232 Dual Driver/Receiver with 卤15kV ESD Protection
LT1781CSW#TRPBF ,Low Power 5V RS232 Dual Driver/Receiver with 卤15kV ESD Protection
LT1781IS ,Low Power 5V RS232 Dual Driver/Receiver with 卤15kV ESD Protection
LT1781IS ,Low Power 5V RS232 Dual Driver/Receiver with 卤15kV ESD Protection


LSM303DLHC
Ultra compact high performance e-compass: 3D accelerometer and 3D magnetometer module
November 2013 DocID018771 Rev 2 1/42
LSM303DLHC

Ultra-compact high-performance eCompass module:
3D accelerometer and 3D magnetometer
Datasheet - production data
Features
3 magnetic field channels and 3 acceleration
channels From ±1.3 to ±8.1 gauss magnetic field full
scale ±2g/±4g/±8g/±16g linear acceleration full scale 16-bit data outputI2 C serial interface Analog supply voltage 2.16 V to 3.6 V Power-down mode / low-power mode 2 independent programmable interrupt
generators for free-fall and motion detection Embedded temperature sensor Embedded FIFO 6D/4D-orientation detection ECOPACK® RoHS and “Green” compliant
Applications
Tilt-compensated compasses Map rotation Position detection Motion-activated functions Free-fall detection Click/double-click recognition Pedometers Intelligent power-saving for handheld devices Display orientation Gaming and virtual reality input devices Impact recognition and logging Vibration monitoring and compensation
Description

The LSM303DLHC is a system-in-package
featuring a 3D digital linear acceleration sensor
and a 3D digital magnetic sensor.
The LSM303DLHC has linear acceleration full
scales of ±2g / ±4g / ±8g / ±16g and a magnetic
field full scale of ±1.3 / ±1.9 / ±2.5 / ±4.0 / ±4.7 /
±5.6 / ±8.1 gauss.
The LSM303DLHC includes an I2 C serial bus
interface that supports standard and fast mode
100 kHz and 400 kHz. The system can be
configured to generate interrupt signals by inertial
wake-up/free-fall events as well as by the position
of the device itself. Thresholds and timing of
interrupt generators are programmable by the end
user. Magnetic and accelerometer blocks can be
enabled or put into power-down mode separately.
The LSM303DLHC is available in a plastic land
grid array package (LGA) and is guaranteed to
operate over an extended temperature range
from -40 °C to +85 °C.
Table 1. Device summary
Part number Temperature
range [°C] Package Packing

LSM303DLHC -40 to +85 LGA-14 Tray
LSM303DLHCTR -40 to +85 LGA-14 Tape
and reel
Contents LSM303DLHC
2/42 DocID018771 Rev 2
Contents Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Module specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1 Sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.4 Communication interfaces characteristics . . . . . . . . . . . . . . . . . . . . . . . . 13
2.4.1 Sensor I2 C - inter IC control interface . . . . . . . . . . . . . . . . . . . . . . . . . .13
2.5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.6 Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.6.1 Linear acceleration sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
2.6.2 Zero-g level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 Factory calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1 Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2 Pull-up resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.3 Digital interface power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.4 Soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.5 High-current wiring effects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.1 I2 C serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.1.1 I2 C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
5.1.2 Linear acceleration digital interface . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
5.1.3 Magnetic field digital interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DocID018771 Rev 2 3/42
LSM303DLHC Contents Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

7.1 Linear acceleration register description . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.1.1 CTRL_REG1_A (20h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
7.1.2 CTRL_REG2_A (21h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
7.1.3 CTRL_REG3_A (22h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
7.1.4 CTRL_REG4_A (23h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
7.1.5 CTRL_REG5_A (24h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
7.1.6 CTRL_REG6_A (25h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
7.1.7 REFERENCE_A (26h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
7.1.8 STATUS_REG_A (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
7.1.9 OUT_X_L_A (28h), OUT_X_H_A (29h) . . . . . . . . . . . . . . . . . . . . . . . . .29
7.1.10 OUT_Y_L_A (2Ah), OUT_Y_H_A (2Bh) . . . . . . . . . . . . . . . . . . . . . . . .29
7.1.11 OUT_Z_L_A (2Ch), OUT_Z_H_A (2Dh) . . . . . . . . . . . . . . . . . . . . . . . .29
7.1.12 FIFO_CTRL_REG_A (2Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
7.1.13 FIFO_SRC_REG_A (2Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
7.1.14 INT1_CFG_A (30h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
7.1.15 INT1_SRC_A (31h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
7.1.16 INT1_THS_A (32h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
7.1.17 INT1_DURATION_A (33h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
7.1.18 INT2_CFG_A (34h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
7.1.19 INT2_SRC_A (35h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
7.1.20 INT2_THS_A (36h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
7.1.21 INT2_DURATION_A (37h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
7.1.22 CLICK_CFG_A (38h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
7.1.23 CLICK_SRC_A (39h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
7.1.24 CLICK_THS_A (3Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
7.1.25 TIME_LIMIT_A (3Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
7.1.26 TIME_LATENCY_A (3Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
7.1.27 TIME_WINDOW_A (3Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
7.2 Magnetic field sensing register description . . . . . . . . . . . . . . . . . . . . . . . 37
7.2.1 CRA_REG_M (00h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
7.2.2 CRB_REG_M (01h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
7.2.3 MR_REG_M (02h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
7.2.4 OUT_X_H_M (03), OUT_X_L_M (04h) . . . . . . . . . . . . . . . . . . . . . . . . .39
7.2.5 OUT_Z_H_M (05), OUT_Z_L_M (06h) . . . . . . . . . . . . . . . . . . . . . . . . .39
7.2.6 OUT_Y_H_M (07), OUT_Y_L_M (08h) . . . . . . . . . . . . . . . . . . . . . . . . .39
7.2.7 SR_REG_M (09h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Contents LSM303DLHC
4/42 DocID018771 Rev 2
7.2.8 IRx_REG_M (0Ah/0Bh/0Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
7.2.9 TEMP_OUT_H_M (31h), TEMP_OUT_L_M (32h) . . . . . . . . . . . . . . . .39 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
DocID018771 Rev 2 5/42
LSM303DLHC List of tables
List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Table 3. Sensor characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Table 4. Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Table 5. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Table 6. I2 C slave timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Table 7. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Table 8. Accelerometer operating mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Table 9. Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Table 10. Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Table 11. Transfer when master is writing one byte to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Table 12. Transfer when master is writing multiple bytes to slave:. . . . . . . . . . . . . . . . . . . . . . . . . . .20
Table 13. Transfer when master is receiving (reading) one byte of data from slave:. . . . . . . . . . . . .20
Table 14. SAD+Read/Write patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Table 15. Transfer when master is receiving (reading) multiple bytes of data from slave . . . . . . . . .21
Table 16. SAD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Table 17. Register address map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Table 18. CTRL_REG1_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Table 19. CTRL_REG1_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Table 20. Data rate configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Table 21. CTRL_REG2_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Table 22. CTRL_REG2_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Table 23. High-pass filter mode configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Table 24. CTRL_REG3_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Table 25. CTRL_REG3_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Table 26. CTRL_REG4_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Table 27. CTRL_REG4_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Table 28. CTRL_REG5_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Table 29. CTRL_REG5_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Table 30. CTRL_REG6_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Table 31. CTRL_REG6_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Table 32. REFERENCE_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Table 33. REFERENCE_A register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Table 34. STATUS_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Table 35. STATUS_A register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Table 36. FIFO_CTRL_REG_A register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Table 37. FIFO_CTRL_REG_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Table 38. FIFO mode configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Table 39. FIFO_SRC_REG_A register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Table 40. INT1_CFG_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Table 41. INT1_CFG_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Table 42. Interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Table 43. INT1_SRC_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Table 44. INT1_SRC_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Table 45. INT1_THS_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Table 46. INT1_THS_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Table 47. INT1_DURATION_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Table 48. INT1_DURATION_A description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
List of tables LSM303DLHC
6/42 DocID018771 Rev 2
Table 49. INT2_CFG_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Table 50. INT2_CFG_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Table 51. Interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Table 52. INT2_SRC_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Table 53. INT2_SRC_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Table 54. INT2_THS_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Table 55. INT2_THS_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Table 56. INT2_DURATION_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Table 57. INT2_DURATION_A description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Table 58. CLICK_CFG_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Table 59. CLICK_CFG_A description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Table 60. CLICK_SRC_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Table 61. CLICK_SRC_A description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Table 62. CLICK_THS_A register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Table 63. CLICK_SRC_A description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Table 64. TIME_LIMIT_A register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Table 65. TIME_LIMIT_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Table 66. TIME_LATENCY_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Table 67. TIME_LATENCY_A description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Table 68. TIME_WINDOW_A register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Table 69. TIME_WINDOW_A description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Table 70. CRA_REG_M register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Table 71. CRA_REG_M description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Table 72. Data rate configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Table 73. CRB_REG_M register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Table 74. CRB_REG_M description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Table 75. Gain setting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Table 76. MR_REG_M register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Table 77. MR_REG_M description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Table 78. Magnetic sensor operating mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Table 79. SR_REG_M register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Table 80. SR_REG_M description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Table 81. IRA_REG_M register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Table 82. IRB_REG_M register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Table 83. IRC_REG_M register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Table 84. TEMP_OUT_H_M register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Table 85. TEMP_OUT_L_M register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Table 86. TEMP_OUT resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Table 87. Document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
DocID018771 Rev 2 7/42
LSM303DLHC List of figures
List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Figure 2. Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Figure 3. I2 C slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Figure 4. LSM303DLHC electrical connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Figure 5. LGA-14: mechanical data and package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
Block diagram and pin description LSM303DLHC
8/42 DocID018771 Rev 2 Block diagram and pin description
1.1 Block diagram
Figure 1. Block diagram
DocID018771 Rev 2 9/42
LSM303DLHC Block diagram and pin description
1.2 Pin description
Figure 2. Pin connections
Table 2. Pin description
Pin# Name Function
Vdd_IO Power supply for I/O pins SCL Signal interface I2 C serial clock (SCL) SDA Signal interface I2 C serial data (SDA) INT2 Inertial interrupt 2 INT1 Inertial interrupt 1 C1 Reserved capacitor connection (C1) GND 0 V supply Reserved Leave unconnected DRDY Data ready Reserved Connect to GND Reserved Connect to GND SETP S/R capacitor connection (C2) SETC S/R capacitor connection (C2) Vdd Power supply
Module specifications LSM303DLHC
10/42 DocID018771 Rev 2
2 Module specifications
2.1 Sensor characteristics

@ Vdd = 2.5 V, T = 25 °C unless otherwise noted(a). The product is factory calibrated at 2.5 V. The operational power supply range is from 2.16 V to 3.6 V.
Table 3. Sensor characteristics
Symbol Parameter Test conditions Min. Typ.(1) Max. Unit

LA_FS Linear acceleration
measurement range(2)
FS bit set to 00 ±2FS bit set to 01 ±4
FS bit set to 10 ±8
FS bit set to 11 ±16
M_FS Magnetic measurement range
GN bits set to 001 ±1.3
gauss
GN bits set to 010 ±1.9
GN bits set to 011 ±2.5
GN bits set to 100 ±4.0
GN bits set to 101 ±4.7
GN bits set to 110 ±5.6
GN bits set to 111 ±8.1
LA_So Linear acceleration sensitivity
FS bit set to 00 1
mg/LSBFS bit set to 01 2
FS bit set to 10 4
FS bit set to 11 12
M_GN Magnetic gain setting
GN bits set to 001 (X,Y) 1100
LSB/
gauss
GN bits set to 001 (Z) 980
GN bits set to 010 (X,Y) 855
GN bits set to 010 (Z) 760
GN bits set to 011 (X,Y) 670
GN bits set to 011 (Z) 600
GN bits set to 100 (X,Y) 450
GN bits set to 100 (Z) 400
GN bits set to 101 (X,Y) 400
GN bits set to 101 (Z) 355
GN bits set to 110 (X,Y) 330
GN bits set to 110 (Z) 295
GN bits set to 111(2) (X,Y) 230
GN bits set to 111(2) (Z) 205
DocID018771 Rev 2 11/42
LSM303DLHC Module specifications
2.2 Temperature sensor characteristics

@ Vdd = 2.5 V, T = 25 °C unless otherwise noted (b).
LA_TCSo Linear acceleration sensitivity
change vs. temperature FS bit set to 00 ±0.01 %/°C
LA_TyOff
Linear acceleration typical
Zero-g level offset
accuracy (3),(4) FS bit set to 00 ±60 mg
LA_TCOff Linear acceleration Zero-g
level change vs. temperature Max delta from 25 °C ±0.5 mg/°C
LA_An Acceleration noise density
FS bit set to 00, normal
mode(Table 8.), ODR bit
set to 1001
M_R Magnetic resolution 2 mgauss
M_CAS Magnetic cross-axis sensitivity Cross field = 0.5 gauss
H applied = ±3 gauss ±1 %FS/
gauss
M_EF Maximum exposed field No permanent effect on
sensor performance 10000 gauss
M_DF Magnetic disturbance field
Sensitivity starts to
degrade. Use S/R pulse to
restore sensitivity gauss
Top Operating temperature range -40 +85 °C Typical specifications are not guaranteed. Verified by wafer level test and measurement of initial offset and sensitivity. Typical Zero-g level offset value after MSL3 preconditioning. Offset can be eliminated by enabling the built-in high-pass filter.
Table 3. Sensor characteristics (continued)
Symbol Parameter Test conditions Min. Typ.(1) Max. Unit
Hz The product is factory calibrated at 2.5 V.
Table 4. Temperature sensor characteristics
Symbol Parameter Test condition Min. Typ.(1) Max. Unit

TSDr Temperature sensor output
change vs. temperature LSB/°C(2)
TODR Temperature refresh rate ODR(3) Hz
Top Operating temperature range -40 +85 °C Typical specifications are not guaranteed. 12-bit resolution. For ODR configuration refer to Table 72.
Module specifications LSM303DLHC
12/42 DocID018771 Rev 2
2.3 Electrical characteristics

@ Vdd = 2.5 V, T = 25 °C unless otherwise noted.
Table 5. Electrical characteristics
Symbol Parameter Test
conditions Min. Typ.(1) Max. Unit

Vdd Supply voltage
2.16 3.6 V
Vdd_IO Module power supply for I/O 1.71 1.8 Vdd+0.1
Idd Current consumption in normal
mode(2) 110 μA
IddSL Current consumption in
sleep-mode(3) 1 μA
Top Operating temperature range -40 +85 °C Typical specifications are not guaranteed. Magnetic sensor setting ODR = 7.5 Hz, Accelerometer sensor ODR = 50 Hz. Linear accelerometer in sleep-mode and magnetic sensor in power-down mode.
DocID018771 Rev 2 13/42
LSM303DLHC Module specifications
2.4 Communication interfaces characteristics

External pull-up resistors are required to support I2 C standard and fast speed modes.
2.4.1 Sensor I2 C - inter IC control interface

Subject to general operating conditions for Vdd and Top.

Figure 3. I2 C slave timing diagram

Note: Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both ports.
Table 6. I2 C slave timing values
Symbol Parameter I2 C standard mode (1) I2 C fast mode (1)
UnitMin. Max. Min. Max.
(SCL) SCL clock frequency 0 100 0 400 kHz
tw(SCLL) SCL clock low time 4.7 1.3 μstw(SCLH) SCL clock high time 4.0 0.6 su(SDA) SDA setup time 250 100 ns
th(SDA) SDA data hold time 0.01 3.45 0.01 0.9 μs
tr(SDA) tr(SCL) SDA and SCL rise time 1000 20 + 0.1Cb(2) 300 nstf(SDA) tf(SCL) SDA and SCL fall time 300 20 + 0.1Cb(2) 300
th(ST) START condition hold time 4 0.6
tsu(SR) Repeated START condition
setup time 4.7 0.6 su(SP) STOP condition setup time 4 0.6
tw(SP:SR) Bus free time between STOP
and START condition 4.7 1.3 Data based on standard I2 C protocol requirement, not tested in production. Cb = total capacitance of one bus line, in pF.
Module specifications LSM303DLHC
14/42 DocID018771 Rev 2
2.5 Absolute maximum ratings

Stresses above those listed as “absolute maximum ratings” may cause permanent damage
to the device. This is a stress rating only and functional operation of the device under these
conditions is not implied. Exposure to maximum rating conditions for extended periods may
affect device reliability.

Table 7. Absolute maximum ratings
Symbol Ratings Maximum value Unit

Vdd Supply voltage -0.3 to 4.8 V
Vdd_IO I/O pins supply voltage -0.3 to 4.8 V
Vin Input voltage on any control pin (SCL, SDA) -0.3 to Vdd_IO +0.3 V
APOW Acceleration (any axis, powered, Vdd = 2.5 V) 3,000 for 0.5 ms g
10,000 for 0.1 ms g
AUNP Acceleration (any axis, unpowered) 3,000 for 0.5 ms g
10,000 for 0.1 ms g
TOP Operating temperature range -40 to +85 °C
TSTG Storage temperature range -40 to +125 °C
ESD Electrostatic discharge protection 2 (HBM) kV
This device is sensitive to mechanical shock, improper handling can cause
permanent damage to the part.
This device is sensitive to electrostatic discharge (ESD), improper handling can
cause permanent damage to the part.
DocID018771 Rev 2 15/42
LSM303DLHC Module specifications
2.6 Terminology
2.6.1 Linear acceleration sensitivity

Linear acceleration sensitivity describes the gain of the accelerometer sensor and can be
determined by applying 1 g acceleration to it. As the sensor can measure DC accelerations,
this can be done easily by pointing the axis of interest towards the center of the Earth,
noting the output value, rotating the sensor by 180 degrees (pointing to the sky) and noting
the output value again. By doing so, ±1 g acceleration is applied to the sensor. Subtracting
the larger output value from the smaller one, and dividing the result by 2, leads to the actual
sensitivity of the sensor. This value changes very little over temperature and also very little
over time. The sensitivity tolerance describes the range of sensitivities of a large population
of sensors.
2.6.2 Zero-g level

Zero-g level offset (TyOff) describes the deviation of an actual output signal from the ideal
output signal if no acceleration is present. A sensor in a steady-state on a horizontal surface
measures 0 g on the X axis and 0 g on the Y axis whereas the Z axis measures 1 g. The
output is ideally in the middle of the dynamic range of the sensor (content of OUT registers
00h, data expressed as two’s complement number). A deviation from the ideal value in this
case is called Zero-g offset. Offset is, to some extent, a result of stress to the MEMS sensor
and therefore the offset can slightly change after mounting the sensor onto a printed circuit
board or exposing it to extensive mechanical stress. Offset changes little over temperature,
see “Zero-g level change vs. temperature”. The Zero-g level tolerance (TyOff) describes the
standard deviation of the range of Zero-g levels of a population of sensors.
Functionality LSM303DLHC
16/42 DocID018771 Rev 2
3 Functionality

The LSM303DLHC is a system-in-package featuring a 3D digital linear acceleration and 3D
digital magnetic field detection sensor.
The system includes specific sensing elements and an IC interface capable of measuring
both the linear acceleration and magnetic field applied to it and providing a signal to the
external world through an I2 C serial interface with separated digital output.
The sensing system is manufactured using specialized micromachining processes, while
the IC interfaces are manufactured using CMOS technology that allows designing a
dedicated circuit which is trimmed to better match the sensing element characteristics.
The LSM303DLHC features two data-ready signals (RDY) which indicate when a new set of
measured acceleration data and magnetic data are available, therefore simplifying data
synchronization in the digital system that uses the device.
The LSM303DLHC may also be configured to generate a free-fall interrupt signal according
to a programmed acceleration event along the enabled axes.
Linear acceleration operating mode

The LSM303DLHC provides two different acceleration operating modes: “normal mode” and
“low-power mode”. While normal mode guarantees high resolution, low-power mode further
reduces current consumption.
Table 8 summarizes how to select the operating mode.
3.1 Factory calibration

The IC interface is factory calibrated for linear acceleration sensitivity (LA_So), and linear
acceleration Zero-g level (LA_TyOff).
The trim values are stored inside the device in nonvolatile memory. Any time the device is
turned on, the trimming parameters are downloaded into the registers to be used during
normal operation. This allows the user to use the device without further calibration.
Table 8. Accelerometer operating mode selection
Operating mode CTRL_REG1[3]
(LPen bit)
CTRL_REG4[3]
(HR bit)
BW
[Hz]
Turn-on time
[ms]

Low-power mode 1 0 ODR/2 1
Normal mode 0 1 ODR/9 7/ODR
DocID018771 Rev 2 17/42
LSM303DLHC Application hints
4 Application hints
4.1 Capacitors

The C1 and C2 external capacitors should be low SR value ceramic type constructions (typ.
recommended value 200 mOhm). Reservoir capacitor C1 is nominally 4.7 μF in
capacitance, with the set/reset capacitor C2 nominally 0.22 F in capacitance.
The device core is supplied through the Vdd line. Power supply decoupling capacitors
(C4 = 100 nF ceramic, C3 = 10 μF Al) should be placed as near as possible to the supply
pin of the device (common design practice). All the voltage and ground supplies must be
present at the same time to have proper behavior of the IC (refer to Figure 4).
The functionality of the device and the measured acceleration/magnetic field data are
selectable and accessible through the I2 C interface.
The functions, the threshold, and the timing of the two interrupt pins (INT1 and INT2) can be
completely programmed by the user through the I2 C interface.
4.2 Pull-up resistors

Pull-up resistors (recommended value 10 kOhm) are placed on the two I2 C bus lines.
Application hints LSM303DLHC
18/42 DocID018771 Rev 2
4.3 Digital interface power supply

This digital interface, dedicated to the linear acceleration and to the magnetic field signal, is
capable of operating with a standard power supply (Vdd) or using a dedicated power supply
(Vdd_IO).
4.4 Soldering information

The LGA package is compliant with the ECOPACK® , RoHS, and “Green” standard.
It is qualified for soldering heat resistance according to JEDEC J-STD-020.
Leave “Pin 1 Indicator” unconnected during soldering.
Land pattern and soldering recommendations are available at /mems.
4.5 High-current wiring effects

High current in the wiring and printed circuit traces can be culprits in causing errors in
magnetic field measurements for compassing.
Conductor-generated magnetic fields add to the Earth’s magnetic field, causing errors in
compass-heading computation.
Keep currents higher than 10 mA a few millimeters further away from the sensor IC.
DocID018771 Rev 2 19/42
LSM303DLHC Digital interfaces
5 Digital interfaces

The registers embedded inside the LSM303DLHC are accessible through two separate I2C
serial interfaces, one for the accelerometer core and one for the magnetometer core.
5.1 I2 C serial interface

The LSM303DLHC I2 C is a bus slave. The I2 C is employed to write the data into the
registers whose content can also be read back.
The relevant I2 C terminology is given in the table below.
There are two signals associated with the I2 C bus, the serial clock line (SCL) and the serial
data line (SDA). The latter is a bidirectional line used for sending and receiving the data
to/from the interface.
Table 9. Serial interface pin description
Pin name Pin description

SCL I2 C serial clock (SCL)
SDA I2 C serial data (SDA)
Table 10. Serial interface pin description
Term Description

Transmitter The device which sends data to the bus
Receiver The device which receives data from the bus
Master The device which initiates a transfer, generates clock signals, and terminates a
transfer
Slave The device addressed by the master
Digital interfaces LSM303DLHC
20/42 DocID018771 Rev 2
5.1.1 I2 C operation

The transaction on the bus is started through a START (ST) signal. A START condition is
defined as a high-to-low transition on the data line while the SCL line is held high. After this
has been transmitted by the master, the bus is considered busy. The next byte of data
transmitted after the start condition contains the address of the slave in the first 7 bits and bit
8 tells whether the master is receiving data from the slave or transmitting data to the slave.
When an address is sent, each device in the system compares the first seven bits after a
start condition with its address. If they match, the device considers itself addressed by the
master.
Data transfer with acknowledge is mandatory. The transmitter must release the SDA line
during the acknowledge pulse. The receiver must then pull the data line low so that it
remains stable low during the high period of the acknowledge clock pulse. A receiver which
has been addressed is obliged to generate an acknowledge after each byte of data
received.
The I2 C embedded inside the LSM303DLHC behaves like a slave device and the following
protocol must be adhered to. After the START condition (ST) a slave address is sent, once a
slave acknowledge (SAK) has been returned, an 8-bit sub-address (SUB) is transmitted; the
7 LSBs represent the actual register address while the MSB enables address auto-
increment. If the MSB of the SUB field is ‘1’, the SUB (register address) is automatically
increased to allow multiple data Read/Write.
Data are transmitted in byte format (DATA). Each data transfer contains 8 bits. The number
of bytes transferred per transfer is unlimited. Data is transferred with the most significant bit
(MSB) first. If a receiver can’t receive another complete byte of data until it has performed
some other function, it can hold the clock line SCL low to force the transmitter into a wait
state. Data transfer only continues when the receiver is ready for another byte and releases
the data line. If a slave receiver doesn’t acknowledge the slave address (i.e. it is not able to
receive because it is performing some real-time function) the data line must be left high by
the slave. The master can then abort the transfer. A low-to-high transition on the SDA line
while the SCL line is high is defined as a STOP condition. Each data transfer must be
terminated by the generation of a STOP (SP) condition.
Table 11. Transfer when master is writing one byte to slave

Master ST SAD + W SUB DATA SP
Slave SAK SAK SAK
Table 12. Transfer when master is writing multiple bytes to slave:

Master ST SAD + W SUB DATA DATA SP
Slave SAK SAK SAK SAK
Table 13. Transfer when master is receiving (reading) one byte of data from slave:

Master ST SAD + W SUB SR SAD + R NMAK SP
Slave SAK SAK SAK DATA
DocID018771 Rev 2 21/42
LSM303DLHC Digital interfaces
5.1.2 Linear acceleration digital interface
For linear acceleration the default (factory) 7-bit slave address is 0011001b.

The slave address is completed with a Read/Write bit. If the bit is ‘1’ (read), a repeated
START (SR) condition must be issued after the two sub-address bytes; if the bit is ‘0’ (write)
the master transmits to the slave with the direction unchanged. Table 14 explains how the
read/write bit pattern is composed, listing all the possible configurations.
In order to read multiple bytes, it is necessary to assert the most significant bit of the sub-
address field. In other words, SUB(7) must be equal to 1 while SUB(6-0) represents the
address of the first register to be read.
In the presented communication format, MAK is master acknowledge and NMAK is no
master acknowledge.
Table 14. SAD+Read/Write patterns
Command SAD[7:1] R/W SAD+R/W

Read 0011001 1 00110011 (33h)
Write 0011001 0 00110010 (32h)
Table 15. Transfer when master is receiving (reading) multiple bytes of data from slave

Master ST SAD SUB SR SAD MAK MAK NMAK SP
Slave SAK SAK SAK DATA DATA DATA
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