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LM98714CCMT/NOPB |LM98714CCMTNOPBNSN/a5avai3 Ch 16-Bit 45 MSPS Digital Copier AFE w/ Integrated CCD/CIS Sensor Timing Generator & LVDS Output 48-TSSOP 0 to 70
LM98714CCMTXNSN/a271avai3 Ch 16-Bit 45 MSPS Digital Copier AFE w/ Integrated CCD/CIS Sensor Timing Generator & LVDS Output 48-TSSOP 0 to 70


LM98714CCMTX ,3 Ch 16-Bit 45 MSPS Digital Copier AFE w/ Integrated CCD/CIS Sensor Timing Generator & LVDS Output 48-TSSOP 0 to 70 SNAS254B–OCTOBER 2006–REVISED APRIL 20175 Pin Configuration and FunctionsDGG Package48-Pin TSSOPTo ..
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LM98714CCMT/NOPB-LM98714CCMTX
3 Ch 16-Bit 45 MSPS Digital Copier AFE w/ Integrated CCD/CIS Sensor Timing Generator & LVDS Output
Support & Product Order Tools & Technical Community Folder Now Documents Software LM98714 SNAS254B – OCTOBER 2006 – REVISED APRIL 2017 LM98714 Three Channel, 16-Bit, 45 MSPS Analog Front End With LVDS/CMOS Output and Integrated CCD/CIS Sensor Timing Generator 1 Features 2 Applications 1• LVDS/CMOS Outputs • Multi-Function Peripherals • LVDS/CMOS Pixel Rate Input Clock or ADC Input • Facsimile Equipment Clock • Flatbed or Handheld Color Scanners • CDS or S/H Processing for CCD or CIS Sensors • High-Speed Document Scanner • Independent Gain/Offset Correction for Each Channel 3 Description The LM98714 is a fully integrated, high performance • Digital Black Level Correction Loop for Each 16-Bit, 45 MSPS signal processing solution for digital Channel color copiers, scanners, and other image processing • Programmable Input Clamp Voltage applications. High-speed signal throughput is • Flexible CCD/CIS Sensor Timing Generator achieved with an innovative architecture utilizing • Key Specifications Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold – Maximum Input Level: 1.2 or 2.4 Volt Modes (S/H) inputs (for Contact Image Sensors and CMOS – (Both with + or – Polarity Option) image sensors). The signal paths utilize 8 bit – ADC Resolution: 16-Bit Programmable Gain Amplifiers (PGA), a ±9-Bit offset correction DAC and independently controlled Digital – ADC Sampling Rate: 45 MSPS Black Level correction loops for each input. The PGA – INL: ±23 LSB (Typ) and offset DAC are programmed independently – Channel Sampling Rate: 15/22.5/30 MSPS allowing unique values of gain and offset for each of the three inputs. The signals are then routed to a 45 – PGA Gain Steps: 256 Steps MHz high performance analog-to-digital converter – PGA Gain Range: 0.7 to 7.84x (ADC). The fully differential processing channel – Analog DAC Resolution: ±9 Bits shows exceptional noise immunity, having a very low noise floor of –74dB. The 16-bit ADC has excellent – Analog DAC Range: ±300 mV or ±600 mV dynamic performance making the LM98714 – Digital DAC Resolution: ±6 Bits transparent in the image reproduction chain. – Digital DAC Range: –1024 LSB to + 1008 LSB (1) Device Information – SNR: –74dB (at 0 dB PGA Gain) PART NUMBER PACKAGE BODY SIZE (NOM) – Power Dissipation: 505 mW (LVDS) 610 mW LM98714 TSSOP (48) 12.50 mm × 6.1 mm (CMOS) – Operating Temp: 0 to 70°C (1) For all available packages, see the orderable addendum at the end of the data sheet. – Supply Voltage: 3.3 V Nominal (3.0 V to 3.6 V Range) System Block Diagram CCD/CIS Sensor Analog Front End SPI Image Processor/ASIC LM98714 Data Output Motor CCD Timing Controllers Sensor Drivers Generator 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
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