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LM2926T-LM2927T
Low Dropout Regulator with Delayed Reset
National
Semiconductor
LM2926/LM2927
General Description
The LM2926 is a 5V, 500 mA, low dropout regulator with
delayed reset. The microprocessor reset flag is set low by
thermal shutdown, short circuits, overvoltage conditions,
dropout, and power-up. After the fault condition is corrected,
the reset flag remains low for a delay time determined by
the delay capacitor. Hysteresis is included in the reset cir-
cuit to prevent oscillations, and a reset output is guaranteed
down to 3.2V supply input. A latching comparator is used to
discharge the delay capacitor, which guarantees a full reset
pulse even when triggered by a relatively short fault condi-
tion. A patented quiescent current reduction circuit drops
the ground pin current to 8 mA at full load when the input-
output differential is 3V or more.
Familiar PNP regulator features such as reverse battery pro-
tection, transient protection, and overvoltage shutdown are
included in the LM2926 making it suitable for use in automo-
tive and battery operated equipment.
The LM2927 is electrically identical to the LM2926 but has a
different pin-out. The LM2927 is pin-for-pin compatible with
February 1990
Low Dropout Regulator with Delayed Reset
the L4947 and TLE4260 alternatives. The LM2926 is pin-
for-pin compatible with the LM2925.
Features
I: 5% output accuracy over entire operating range
a Dropout voltage typically 350 mV at 500 mA output
I: Externally programmed reset delay
I! Short circuit proof
" Reverse battery proof
I: Thermally protected
" LM2926 is pin-for-pin compatible with the LM2925
n 100% electrical burn-in
Applications
" Battery operated equipment
a Microprocessor-based systems
a Portable instruments
Typical Application
'Required it regulator is located far (>2'') from power supply filter.
"Co must be at least 10 pF to maintain stability. May be increased without
bound to maintain regulation during transients. Locate as close as possible
to the regulator. This capacitor msut be rated over the same operating tem-
perature range as the regulator, The equivalent series resistance (ESR) of
this capacitor is critical; see curve under Typical Performance Character-
lstlcs.
Front View
Order Number LM2926T
See NS Package Number TOSA
Front View
Order Number LM2927T
See NS Package Number TOSA
Unregulated
1 psf I
t 1 VIN
Delgyod 2 -
ttset - LM2926 h, - W, 500 ttth
Output
. Co.‘
Cdohyi GND 3 IO [4F
10 nFI
TL/H/10759-1
Connection Diagrams and Ordering Information
5-Lead T0-220
5 DELAYED RESET OUTPUT
4 DELAY CAPACITOR
3 GROUND
2 OUTPUT VOLTAGE (yo)
1 INPUT VOLTAGE (vm)
TL/H/10759-2
5-Lead TO-220
5 OUTPUT YOLTAGE (v0)
4 DELAY CAPACITOR
3 GROUND
2 DELAYED RESET OUTPUT
I INPUT VOLTAGE (vm)
TLfH/10759- 1 4
©1990 National Semiconductor Corporation TL/ H / 10759
I F3RD-B20Mi?0/Prmtsd in U. S. A
19398 Deflelafl l«HW‘ Jomlnfiau IDOdOJCI MO'I LZGZW'I/QZGZW'I
Absolute Maximum Ratings (Note1)
If Mllltary/Aerospace specified devices are required,
Semiconductor Sales
Officé/Dlstributors for availability and speclfications.
please contact the National
Input VoItage
ESD Susceptibility (Note 2)
Power Dissipation (Note 3)
Junction Temperature (TUMAX)
Storage Temperature Range
Internally Limited
-4ty'C to +150°C
Survival
t = 100 ms 80V Lead Temperature (Soldering, 10 sec.) 260°C
t = 1 ms -50V . .
Continuous - 18V to +26V Operating Ratings (Note 1)
Reset Output Sink Current 10 mA Junction Temperature Range (T J) -40''C to + 125°C
Maximum Input Voltage 26V
Electrical Characteristics vm = 14.4v, Co = 10 pxF, --40"C g To s 125°C, unless otherwise specified.
. Typ Limit Units
Parameter Conditions (Note 4) (Note 5) (Limit)
REGULATOR OUTPUT
OutputVoltage 5 mA g lo s 500 mA, 4.85 V (min)
T J = 25"C 5 V
5.15 V (max)
5 mA C. lo C 500 mA 4.75 V (min)
5.25 V (max)
Line Regulation 10 = 5 mA, 9V C VIN s 16V 1 mV
25 mV (max)
Io = 5 mA, 7V 3 Vm C 26V 3 mV
50 mV (max)
Load Regulation 5 mA s; IO s 500 mA 5 mV
60 mV (max)
Quiescent Current Io = 5 mA 2 mA
3 mA (max)
Io = 500 mA 8 mA
30 mA (max)
QuiescentCurrent at Low VIN lo = 5 mA, VIN = 5V 3 mA
10 mA (max)
Io = 500 mA, VIN = 6V 25 mA
60 mA (max)
DropoutVoltage (Note 6) IO = 5 mA, T J = 25"C 60 mV
200 mV (max)
IO = 5 mA 300 mV (max)
Io = 500 mA, TJ = 25"G 350 mV
600 mV (max)
IO = 500 mA 700 mV (max)
Short CircuitCurrent VIN = 8V, Rt. = 1n 800 mA (min)
3 A (max)
Ripple Rejection fRIPPLE = 120 Hz, N/RIPPLE = 1 Vrms, lo 727, 50 mA 60 dB (min)
Output Impedance Io = 50 mAdc and 10 mArms © 1 kHz 100 mn
Output Noise 10 Hz to 100 kHz, lo I 50 mA 1 mVrms
Long Term Stability 20 mV/ 1000 Hr
Maximum Operational Input Voltage Continuous 26 V (min)
Electrical Characteristics
VIN = 14.4V, Co = 10 WF, --40oC C T J s: 125°C, unless otherwise specified (Continued)
Typ lelt Units
Pa a ter
r me Condltlons (Note 4) (Note 5) (Limit)
REGULATOR OUTPUT (Continued)
Peak Transient Input Voltage Vo S 7V, RL = 1000, tt = 100 ms 80 V (min)
Reverse DC Input Voltage vo 2 -0.6V, RL = 1000 -1t3 V (min)
Reverse Transientlnput Voltage tr = 1 ms, RL = 100n -5C) V (min)
RESET OUTPUT
Threshold AVO Required for Reset Condition (Note 7) -80 mV (min)
- 250 mV
-- 400 mV (max)
Output Low Voltage ISINK = 1.6 mA, VIN = 3.2V 0.15
0.4 V (max)
Internal Pull-Up Resistance 30 k0.
Delay Time CDELAY = 10 nF (See Timing Curve) 19 ms
Minimum Operational Vm Delayed Reset Output Sl 0.8V, 2.2 V
on Power Up ISINK = 1.6 mA, RL = 100ft 3.2 V (min)
Minimum Operational Vo Delay Reset Output S 0.8V, 0 7 V
on Power Down ISINK = 10 " VIN = 0V .
DELAY CAPACITOR PIN
Threshold Difference (AVDELAY) Change in Delay Capacitor Voltage Required for 3.5 V (min)
Reset Output to Return High 3.75 V
4.1 V (max)
Charging Current (IDELAy) 1.0 pA (min)
2.0 pA
3.0 pLA (max)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed trpsscifications and test conditions, see the Electrical Characteristics.
Note 2: Human body model; 100 pF discharged through a 1.5 kn resistor.
Note 3: The maximum power dissipation is a function of T JMAX, and 9JA< and TA, and is limited by thermal shutdown. The maximum allowable power dissipation at
any ambient temperature is PD = (T os/oi-TAY/O JA. If this dissipation is exceeded. the die temperature will rise above 150°C and the device will go into thermal
shutdown. For the LM2926 and LM2927, the iurtction-to-am0isnt thermal resistance is 53''C/W, and the iunction-to-case thermal resistance is 3''C/W.
Note t: Typicals are at T J = 25''C and represent the most likely parametric norm.
Note 5: Limits are 100% guaranteed by production testing.
Note 6: Dropout voltage is the input-output differential at which the circuit ceases to regulate against any further reduction in input voltage, Dropout voltage is
measured when the output voltage (V0) has dropped 100 mV from the nominal vatue measured at VIN = 14.4V.
Note T: The reset flag is set LOW when the output voltage has dropped an amount, Avo, from the nominal value measured at VIN = 14.4V.
Typical Performance Characteristics
DROPOUT VOLTAGE (V) SUPPLY CURRENT (mA) OUTPUT VOLTAGE
RIPPLE REJECTION (dB)
-50 -25 0 25 50 75 I00 125
JUNCTION TEMPERATURE, r, PC)
Supply Current
RL = soon
40 -- l 4,, (
'40 - 20 0 20 40 $0 80
INPUT VOLTAGE (V)
Dropout Voltage
Tc=125°C
0.4 TC =
IC = - IPC
0 100 200 300 400 500
OUTPUT cunnem (mA)
0 Ripple Rejection
VIN = 14.0}
Co =10 pr
[SR = 0.50
IO = 250
100 1k 10k 100k IH
FREQUENCY (H1)
OUYPUT CURRENI (A) OUIESCENY CURRENT (mA) OU‘H’UT VOLI'AGE (V)
RIPPLE REJiCTION (d8)
6 Low V Behavior
l = 5mA
4 IL = 500 mA
INPUT vomc: (v)
Quiescent Current
I =500 A [
L m rc=25°c
Tc =125°c
INPUT VOLTAGE (V)
Output Current Limit
3 RL " m
T, =-40°J
TJ=25°J
l TJ=125°J
0 5 IO 15 20 25 30
INPUI VOLIAGE (v)
D Ripple Rejection
Co = 10 pf
'0 = 250 mA
'vippll
= 120 Hz
ESR = 030
0 6 810l21416l8 20
INPUT VOLTAGE (v)
EQUIVALENT SERIES RESISIANCE (n) QUIESCENT CUEHENT (mA) OUTPUT VOLTAGE (v)
OUTPUT IMPEDANCE (m0)
at V Extremes
-40 -20 tl 20 40 60 80
INPUY vomct (v)
Quiescent Current
T = 25°C
T = -40°C
T=I250t
5 100 100 300 400 500
OUTPUT CURRENT (mA)
Output Capacitor ESR
0 100 200 300 400 500
OUTPUT cumzm (MA)
Output Impedance
w hr: =1uv
co = IO HF
[SR = th5tt
I0 = 250 mA
100 lk IOk 100k N
FREQUENCY (Hz)
TL/H/10759-3
Typical Performance Characteristics (Continued)
Line Transient Response Load Transient Response
Maximum Power
Dissipation (TO-220)
tds, co=1our ig Co=10p7 Hm SINK
5" lo=500mA & 05
28 BCE A
Eel 2 '
F.. P, o =
3 U 50 2 HEAT SINK
3: ia-Pi o tY
oz 2 - g 6
is Ui 50 2
=5 " 4
tii fit -100 2
O O i)
-50-25 0 25 so 75100125
AMBIENT mpmrunz. TA (Y)
Reset Delay Reset Delay
10.0 m
Ci?. M E Cate, =10nr
"s i "ss, ,
S a 20 x
S',, 0.10 itit,i
1 10 lm lk -50 -25 o 25 so 75 100 125
DELAY ammo: (nr)
Typical Circuit Waveforms
80V Load- dump Transient
Low/High
Input Vonago 25" 26V
Loss of
Input Voltage
Povur-up
Input Voltage
Overvottago
Shutdown
Ouiput Vonage
ov d --toerr ‘dolay - l
5y l, - t duhy
Delay Capacitor "saw /
Voltage oy /
I I -''i
5V l I l
Dehyod Rose!
Output oy
l l I I
JUNCYION mltTftAT1JitE, T: (HO
TL/H/10759-4
Thermal
Shutdown
talloy
TL/H/ 10759-5
Applications Information
EXTERNAL CAPACITORS
The LM2926/7 output capacitor is required for stability.
Without it, the regulator output will oscillate at amplitudes as
high as several volts peak-to-peak at frequencies up to
500 kHz. Although 10 p.F is the minimum recommended
value, the actual size and type may vary depending upon
the application load and temperature range. Capacitor
equivalent series resistance (ESR) also affects stability. The
region of stable operation is shown in the Typical Perform-
ance Characteristics (Output Capacitor ESR curve).
Output capacitors can be increased in size to any desired
value above 10 WF. One possible purpose of this would be
to maintain the output voltage during brief conditions of in-
put transients that might be characteristic of a particular
system.
Capacitors must also be rated at all ambient temperatures
expected in the system. Many aluminum tslectrolytits freeze
at temperatures below -30''C, reducing their effective ca-
pacitance to zero. To maintain regulator stability down to
-4ty'C, capacitors rated at that temperature (such as tanta-
turns) must be used.
DELAYED RESET
The delayed reset output is designed to hold a microproces-
sor in a reset state on system power-up for a programmable
time interval to allow the system clock and other powered
circuitry to stabilize. A full reset interval is also generated
whenever the output voltage falls out of regulation. The cir-
cuit is tripped whenever the output voltage of the regulator
is out of regulation by the Reset Threshold value. This can
be caused by low input voltages, over current conditions,
over-voltage shutdown, thermal shutdown, and by both
power-up and power-down sequences. When the reset cir-
cuit detects one of these conditions, the delay capacitor is
discharged by an SCR and held in a discharged state by a
saturated NPN switch. As long as the delay capacitor is held
low, the reset output is also held low. Because of the action
of the SCR, the reset output cannot glitch on noise or tran-
sient fault conditions. A full reset pulse is obtained for any
fault condition that trips the reset circuit.
When the output regains regulation, the SCH is switched off
and a small current (IDELAY = 2 p.A) begins charging the
delay capacitor. When the capacitor voltage increases
3.75V (AVDELAY) from its discharged value, the reset output
is again set HIGH. The delay time is calculated by:
delay time -- "DELA_Y"''DElaht DELAY (1)
IDELAY
delaytime Ct'. 1.9 x 106 CDELAY (2)
The constant, 1.9 x 106, has a i20% tolerance from de-
vice to device. The total delay time error budget is the sum
of the 20% device tolerance and the tolerance of the exter-
nal capacitor. For a 20% timing capacitor tolerance, the
worst case total timing variation would amount to t 40%, or
a ratio of 2.33:1. In most applications the minimum expected
reset pulse is of interest. This occurs with minimum CDELAy,
minimum AVDELAY- and maximum IDELAY~ AVDELAY and
IDELAY are fully specified in the Electrical Characteristics.
Graphs showing the relationship between delay time and
both temperature and CDELAY are shown in the Typical
Performance Characteristics.
As shown in Figure 1, the delayed reset output is pulled low
by an NPN transistor (02), and pulled high to V0 by an
internal 30 kft resistor (R3) and PNP transistor (03). The
reset output will operate when Vo is sufficient to bias Q2
(0.7V or more). At lower voltages the reset output will be in a
high impedance condition. Because of differences in the
l/BE of 02 and Q3 and the values of R1 and R2, 02 is
guaranteed by design to bias before O3, providing a smooth
transition from the high impedance state when Vo < 0.7V,
to the active low state when V0 > 0.7V.
External Puli-up
Resistor
Dolayod Rout Output
TL/H/ 10759-6
FIGURE 1. Delay Reset Output
The static reset characteristics are shown in Figure 2. This
shows the relationship between the input voltage, the regul-
tor output and reset output. Plots are shown for various ex-
ternal pull-up resistors ranging in value from 3 kn. to an
open circuit. Any external pull-up resistance causes the re-
set output to follow the regulator output until 02 is biased
ON. CDELAY has no effect on this characteristic.
RL=IOOD VIN
5 Co=10uF
co.r=o
E /,V0UT Vnzsn
/ R=3k
v/i-los:
o . l l
0 200 ‘00 600 8tX9ttXXl12tX914tn
TIME (pa)
TL/H/10759-7
FIGURE 2. Reset Output Behavior during Power-Up
Figure 2 is useful for determing reset performance at any
particular input voltage. Dynamic performance at power-up
will closely follow the characteristics illustrated in Figure a
except for the delay added by CDELAY when V0 reaches 5V.
The dynamic reset characteristics at power-down are illus-
trated by the curve shown in Figure 3. At time t= 0 the input
voltage is instantaneously brought to ov, leaving the output
powered by Co. As the voltage on Co decays (discharged
by a 1000 load resistor), the reset output is held low. As vo
drops below 0.7V, the reset rises up slightly should there be
any external pull-up resistance. With no external resistance,
the reset line stays low throughout the entire power down
cycle. If the input voltage does not fall instantaneously, the
reset signal will tend to follow the performance characteris-
tics shown in Figure 2.
Applications Information (Continued)
SYSTEM DESIGN CONSIDERATIONS
Many microprocessors are specified for operation at 5V
110%, although they often continue operating well outside
this range. Others. such as certain members of the COPS
family of microcontrollers, are specified for operation as low
as 2.4V.
VIN RL=1oon
5 Co:10pF
'ii". cdoley'o
g 3 , v
's \OUT
9: 2 N
3 Vazsn R=510k
R=3k \ k):
0 L F _ sd
0 50010001500200025003000
nu: (ps)
Tc/H/10759-8
FIGURE 3. Reset Output Behavior during Power-Down
Of particular concern is low voltage operation, which occurs
in battery operated systems when the battery reaches the
end of its discharge cycle. Under this condition, when the
supply voltage is outside the guaranteed operating range,
the clock may continue to run and the microprocessor will
attempt to execute instructions. If the supply voltage is out-
side the guaranteed operating range, the instructions may
not execute properly and a hardware reset such as is sup-
plied by the LM 2926/7 may fail to bring the processor un-
der control. The LM2926/ 7 reset output may be more effi-
ciently employed in certain applications as a means of de-
feating memory WRITE lines, clocks, or external loads, rath-
er than depending on unspecified microprocessor operating
conditions.
In critical applications the microprocessor reset input should
be fully characterized and guaranteed to operate until the
clock ceases oscillating.
INPUT TRANSIENTS
The LM2926/7 are guaranteed to withstand positive input
transients to 80V followed by an exponential decay of
T = 20 ms (tt = 100 ms, or 5 time constants) while main-
taining an output of less than 7V. The regulator remains
operational to 26 Voc, and shuts down it this value is ex-
ceeded.
Battery Powered Regulator with Flashing
LED for Low Battery Indication
tW Battery - [-1
Delayed VOUT 5V/500 mA
Reset LM2926/27
Output
cdalay GND .
l 10 Hr
0.01 gr: I l
j, :1 I n
LM3909 = 100 pF
TL/H/10759-9
General Microprocessor Configuration
w'---"-?],:
Delayed Your 50500 mA
Reset -- LM2925/27
Output
cdclay
E Vcc 5i1-z. tt, ADDRESS
Mom BUS
Rttset zzz) CONTROL BUS
TC/H/leg-IO
Applications Information (Continued)
Using the Reset to De-Activate Power Loads. The LM1921 is a Fully Protected 1 Amp High-Side Driver.
tpr A-
Delayed Vour "ty""
Rem LM2926/27
Output
cos, GND
11pr J,
IIHL—o
VchI _
5 LM1921 Out -
Input 2 l
tNuo-ll-
Generating an Active High Reset Signal
VIN 0T
0.01 r
deolay
TLfH/10759-12
TL/H/1tn59-11
Using the Reset to Ensure an Accurate Display
on Power-Up or Power-Down
VINO "
5v/soo mA
Lu2926/27 .
zzonr l
TL/H/10759-13
LM2926/LM2927 Low Dropout Regulator with Delayed Reset
Physical Dimensions inches (millimeters)
1l.39ti.-tMa
"th03-Ith8rl
0.110 10.010
(6.350 41.254)
(2.794 41.254)
1.020 $0.015
(25.91 10.301)
LIFE SUPPORT POLICY
0.340 10.010
(8.636 '02541
0.540 20.015
(13.715 41.301)
0.035 .0005 (0.381
0.015 41.002 --1
- 0.051
-itus-a,orir-) +
0.051 20.005
--- TO
11.702 '0.127)
5-Lead TO-220 Outline Drawing
Order Number LM2926T or LM2927T
NS Package Number TOSA
f-- SEATING PLANE
Ji0:lli12, 0.130 10.005
/"" (3.835 "h051) - (4.572 20.121)
" - 0.0511 10.002
- (1.210 10.051)
0.250 .lhill0
-- TAPEHED I'
t SIDES
(essr t0.331)
"9 [IV Ki
Lit #107996
NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
National Sstrtlettnduetttr
Corponllon
2900 Semiconductor Dnve
PO. Box 58090
Santa Clara. CA 95052-6090
Tel: (408) 721-5000
TWK: (910) 339-9240
National Scmlconductor
Industrittstr8sse 10
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Tel: (00141) 103-0
Telex: 527649
Fax: (06161) 103554
effectiveness.
MAR 1 2 1991
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(Auslnlh) m. Ltd.
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Melbourne, 3004
Victory. Australia
Tar (03) 267-5000
Fax 6143-2677458
Nauonal does not assume any "rsportselity tor use of any mrcullry descnbed. no arcun patent Imenses are Imphed and Nabonal reserves me trght at any time vnmout nobce to change sad cucumy and specdicabons.
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Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
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This file is the datasheet for the following electronic components:
LM2926T - product/Im2926t?HQS=T|-nu||-nu|l-dscataIog-df-pf-nuII-wwe
LM2826 - product/Im2826?HQS=T|-nu|I-null-dscatalog-df—pf—nulI-wwe
LM2927T - product/Im2927t?HQS=T|-nu|I-nu|I-dscatalog-df—pf—nuII-wwe
