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L6751BSTN/a5224avaiDigitally Controlled Dual PWM for Intel VR12 and AMD SVI


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L6751B
Digitally Controlled Dual PWM for Intel VR12 and AMD SVI
December 2012 Doc ID 024028 Rev 1 1/58
L6751B

Digitally controlled dual PWM for Intel VR12 and AMD SVI
Datasheet − production data
Features
VR12 compliant with 25 MHz SVID bus rev1.5 SerialVID with programmable IMAX,
TMAX, VBOOT, ADDRESS AMD SVI compliant Second generation LTB Technology® Flexible driver/DrMOS support JMode support Fully configurable through PMBus™ Dual controller: up to 6 phases for CORE and memory 1 phase for graphics (GFX), system agent
(VSA) or Northbridge (VDDNB) Single NTC design for TM, LL and Imon
thermal compensation (for each section) VFDE and GDC - gate drive control for
efficiency optimization DPM - dynamic phase management Dual remote sense; 0.5% Vout accuracy Full-differential current sense across DCR AVP - adaptive voltage positioning Dual independent adjustable oscillator Dual current monitor Pre-biased output management Average and per-phase OC protection OV, UV and FB disconnection protection Dual VR_RDY VFQFPN68 8x8 mm package
Applications
High-current VRM / VRD for desktop / server /
workstation Intel / AMD CPUs DDR3 memory supply

Description

The L6751B is a universal digitally controlled dual
PWM DC-DC designed to power Intel’s VR12 and
AMD SVI processors and memories: all required
parameters are programmable through dedicated
pinstrapping and PMBus interface.
The device features up to 6-phase programmable
operation for the multi-phase section and a single-
phase with independent control loops. When
configured for memory supply, single-phase
(VTT) reference is always tracking multi-phases
(VDDQ) scaled by a factor of 2. The L6751B
supports power state transitions featuring VFDE,
programmable DPM and GDC maintaining the
best efficiency over all loading conditions without
compromising transient response. The device
assures fast and independent protection against
load overcurrent, under/overvoltage and feedback
disconnections.
The device is available in VFQFPN68 8x8 mm
package.
Table 1. Device summary
Contents L6751B
2/58 Doc ID 024028 Rev 1
Contents Typical application circuit and block diagram . . . . . . . . . . . . . . . . . . . . 6

1.1 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pin description and connection diagram . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Device configuration and pinstrapping tables . . . . . . . . . . . . . . . . . . . 20
4.1 JMode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.2 Programming HiZ level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Device description and operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Output voltage positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.1 Multi-phase section - phase # programming . . . . . . . . . . . . . . . . . . . . . . 29
6.2 Multi-phase section - current reading and current sharing loop . . . . . . . . 29
6.3 Multi-phase section - defining load-line . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.4 Single-phase section - disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.5 Single-phase section - current reading . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.6 Single-phase section - defining load-line . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.7 Dynamic VID transition support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
6.7.1 LSLESS startup and pre-bias output . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6.8 DVID optimization: REF/SREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Output voltage monitoring and protection . . . . . . . . . . . . . . . . . . . . . . 34
7.1 Overvoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7.2 Overcurrent and current monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7.2.1 Multi-phase section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
L6751B Contents
Doc ID 024028 Rev 1 3/58
7.2.2 Overcurrent and power states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
7.2.3 Single-phase section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Single NTC thermal monitor and compensation . . . . . . . . . . . . . . . . . 39
8.1 Thermal monitor and VR_HOT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.2 Thermal compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.3 TM/STM and TCOMP/STCOMP design . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Efficiency optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
9.1 Dynamic phase management (DPM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
9.2 Variable frequency diode emulation (VFDE) . . . . . . . . . . . . . . . . . . . . . . 42
9.2.1 VFDE and DrMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
9.3 Gate drive control (GDC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Main oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 System control loop compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
11.1 Compensation network guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
11.2 LTB Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 PMBus support (preliminary) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
12.1 Enabling the device through PMBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
12.2 Controlling Vout through PMBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
12.3 Input voltage monitoring (READ_VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
12.4 Duty cycle monitoring (READ_DUTY) . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
12.5 Output voltage monitoring (READ_VOUT) . . . . . . . . . . . . . . . . . . . . . . . . 54
12.6 Output current monitoring (READ_IOUT) . . . . . . . . . . . . . . . . . . . . . . . . 54
12.7 Temperature monitoring (READ_TEMPERATURE) . . . . . . . . . . . . . . . . . 54
12.8 Overvoltage threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
List of tables L6751B
4/58 Doc ID 024028 Rev 1
List of tables

Table 1. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 5. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 6. Device configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 7. Phase number programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 8. IMAX, SIMAX pinstrapping (Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 9. ADDR pinstrapping (Note 1, 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 10. BOOT / TMAX pinstrapping (Note 1, 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 11. DPM pinstrapping (Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 12. GDC threshold definition (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 13. L6751B protection at a glance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 14. Multi-phase section OC scaling and power states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 15. Efficiency optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 16. Supported commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 17. OV threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 18. L6751B VFQFPN68 8x8 mm mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 19. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
L6751B List of figures
Doc ID 024028 Rev 1 5/58
List of figures

Figure 1. Typical 6-phase application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. L6751B pin connections (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. JMode: voltage positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 5. Device initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 6. Voltage positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 7. Current reading. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 8. SLESS startup: enabled (left) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 9. LSLESS startup: disabled (right) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 10. DVID optimization circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 11. Thermal monitor connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 12. Output current vs. switching frequency in PSK mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 13. Efficiency performance with and without enhancements (DPM, GDC). . . . . . . . . . . . . . . . 44
Figure 14. ROSC vs. FSW per phase (ROSC to GND - left; ROSC to 3.3 V - right) . . . . . . . . . . . . . . . . 45
Figure 15. Equivalent control loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 16. Control loop bode diagram and fine tuning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 17. Device initialization: PMBus controlling Vout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 18. L6751B VFQFPN68 8x8 mm drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
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