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L6668STN/a10avaiSMART PRIMARY CONTROLLER
L6668TRSTN/a70000avaiSMART PRIMARY CONTROLLER


L6668TR ,SMART PRIMARY CONTROLLERFeaturesFigure 1. Package■ MULTIPOWER BCD TECHNOLOGY■ LOAD-DEPENDENT CURRENT-MODE CON-TROL: FIXED-F ..
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L6668-L6668TR
SMART PRIMARY CONTROLLER
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L6668

May 2005 General Features MULTIPOWER BCD TECHNOLOGY LOAD-DEPENDENT CURRENT-MODE CON-
TROL: FIXED-FREQUENCY (HEAVY LOAD),
FREQUENCY FOLDBACK (LIGHT LOAD),
BURST-MODE (NO-LOAD) ON-BOARD HIGH-VOLTAGE START-UP IMPROVED STANDBY FUNCTION LOW QUIESCENT CURRENT (< 2 mA) SLOPE COMPENSATION PULSE-BY-PULSE & HICCUP-MODE OCP INTERFACE WITH PFC CONTROLLER DISABLE FUNCTION (ON/OFF CONTROL) LATCHED DISABLE FOR OVP/OTP FUNC-
TION PROGRAMMABLE SOFT-START 2% PRECISION REFERENCE VOLTAGE EX-
TERNALLY AVAILABLE ±800 mA TOTEM POLE GATE DRIVER WITH
INTERNAL CLAMP AND UVLO PULL-DOWN BLUE ANGEL, ENERGY STAR, EU CODE OF
CONDUCT COMPLIANT SO16 PACKAGE ECOPACK®
1.1 APPLICATIONS
HI-END AC-DC ADAPTERS/CHARGERS FOR
NOTEBOOKS. LCD/CRT MONITORS, LCD/CRT TV DIGITAL CONSUMER
Figure 2. Block Diagram
PRELIMINARY DATA

SMART PRIMARY CONTROLLER
Rev. 1
L6668
3/23
L6668
Table 4. Pin Description
L6668
Table 5. Electrical Characteristcs

(Tj = 0 to 105°C, Vcc=15V, Co=1nF; RT =13.3k , CT =1nF; unless otherwise specified)
Table 4. Pin Description (continued)
5/23
L6668
Table 5. Electrical Characteristcs (continued)

(Tj = 0 to 105°C, Vcc=15V, Co=1nF; RT =13.3k , CT =1nF; unless otherwise specified)
L6668
(1), (2) Parameters in tracking each other
Figure 4. Typical System Block Diagram
Table 5. Electrical Characteristcs (continued)

(Tj = 0 to 105°C, Vcc=15V, Co=1nF; RT =13.3k , CT =1nF; unless otherwise specified)
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L6668 Typical Electrical Performance
Figure 5. High-voltage generator ON-state sink
current vs. Tj
Figure 6. High-voltage generator output (Vcc
charge current) vs. Tj
Figure 7. High-voltage pin leakage vs. Tj
Figure 8. High-voltage generator start voltage
vs. Tj
Figure 9. High-voltage generator Vcc restart
voltage vs. Tj
Figure 10. IC consumption vs. Tj
L6668
Figure 11. Start-up & UVLO vs. Tj
Figure 12. Vcc Zener voltage vs. Tj
Figure 13. COMP voltage upper clamp level vs. Tj
Figure 14. COMP source current vs. Tj
Figure 15. COMP dynamic resistance vs. Tj
Figure 16. Max. duty-cycle vs. Tj
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L6668
Figure 17. Oscillator frequency vs. Tj
Figure 18. Oscillator ramp vs. Tj
Figure 19. Current sense clamp vs. Tj
Figure 20. Disable level on current sense vs. Tj
Figure 21. Reference voltage vs. Tj
Figure 22. PFC_STOP open/low thresholds on
VCOMP vs. Tj

VISENx
L6668
Figure 23. Standby thresholds vs. Tj
Figure 24. Standby pin dropout vs. Tj
Figure 25. DIS threshold vs. Tj
Figure 26. SKIPADJ hysteresis vs. Tj
Figure 27. SKIPADJ disable threshold vs. Tj
Figure 28. Soft-start charge current vs. Tj
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L6668
Figure 29. S-COMP ramp vs. Tj
Figure 30. UVLO saturation vs. Tj
Figure 31. Gate-drive clamp vs. Tj
Figure 32. Gate-drive output low saturation
Figure 33. Gate-drive output high saturation
L6668 Application Information
The L6668 is a versatile current-mode PWM controller specific for offline fixed-frequency, peak-current-
mode-controlled flyback converters.
The device is able to operate in different modes (fig. 34), depending on the converter's load conditions: Fixed frequency at heavy load. In this region the IC operates exactly like a standard current mode control
chip: a relaxation oscillator, externally programmable with a capacitor and a resistor, generates a sawtooth
and releases a clock pulse during the falling edge of the sawtooth; the power switch is turned on by the clock
pulses and is turned off by the control loop. Frequency-foldback mode at medium and light load. As the load is reduced the oscillator frequency is re-
duced as well by slowing down the charge of the timing capacitor proportionally to the load itself. Burst-mode control with no or very light load. When the load is extremely light or disconnected, the converter
will enter a controlled on/off operation with constant peak current. A load decrease will be then translated
into a frequency reduction, which can go down even to few hundred hertz, thus minimizing all frequency-
related losses and making it easier to comply with energy saving regulations. Being the peak current very
low, no issue of audible noise arises.
Figure 34. Multi-mode operation of the L6668
4.1 High-voltage start-up generator

Figure 35 shows the internal schematic of the high-voltage start-up generator (HV generator). It is made
up of a high-voltage N-channel FET, whose gate is biased by a 15 MΩ resistor, with a temperature-com-
pensated current generator connected to its source.
Figure 35. High-voltage start-up generator: internal schematic

The HV generator is physically located on a separate chip, made with BCD off-line technology able to with-
stand 700V, controlled by a low-voltage chip, where all of the control functions reside.
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