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L6615D
LOAD SHARE CONTROLLER
1/20
L6615December 2002 SSI SPECS COMPLIANT HIGH/LOW SIDE CURRENT SENSING FULLY COMPATIBLE WITH REMOTE
OUTPUT VOLTAGE SENSING FULL DIFFERENTIAL LOW OFFSET
CURRENT SENSE 2.7V TO 22V VCC OPERATING RANGE 32kΩ SHARE SENSE AMPLIFIER INPUT
IMPEDANCE HYSTERETIC UVLO
APPLICATION DISTRIBUTED POWER SYSTEMS HIGH DENSITY DC-DC CONVERTERS (N+1) REDUNDANT SYSTEMS, N UP TO 20 SMPS FOR (WEB) SERVERS
DESCRIPTIONThis controller IC is specifically designed to
achieve load sharing of paralleled and indepen-
dent power supply modules in distributed power
systems, by adding only few external components.
Current sharing is achieved through a single wire
connection (share bus) common to all of the paral-
leled modules.
HIGH/LOW SIDE LOAD SHARE CONTROLLER
TYPICAL APPLICATION DIAGRAM
L6615 2/20
DESCRIPTION (continued)Load sharing is a technique used in all the systems in which the load requires low voltage, high current
and/or redundancy; for this reason a modular power system is necessary in which two or more power sup-
plies or DC-DC converters are paralleled.
The device is able to perform both high side and low side current sensing, that is the sense current resistor
can be placed either in series to the power supplies output or on the ground return.
The L6615 then drives the share bus to a voltage proportional to the output current of the master that is
to the highest amongst the output currents delivered by the paralleled power supplies.
The share bus dynamics is independent of the power supply output voltage and is clamped only by the
device supply voltage (VCC).
The output voltage of the other paralleled power supplies (slaves) is then trimmed by the ADJ pin so that
they can support their amount of load current. The slave power supplies work as current-controlled current
sources.
Sharing the output currents is useful for equalizing also the thermal stress of the different modules and
providing an advantage in term of reliability.
Moreover the paralleled supplies architecture allows achieving redundancy; the failure of one of the mod-
ules can be tolerated until the capability of the remaining power supplies is enough to provide the required
load current.
PIN DESCRIPTION
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L6615
ABSOLUTE MAXIMUM RATINGSAll voltages are with respect to pin 1. Currents are positive into, negative out of the specified terminal.
(*) Maximum package power dissipation limits must be observed
PIN CONNECTION
THERMAL DATA
L6615 4/20
ELECTRICAL CHARACTERISTCS (Tj = -40 to 85°C, Vcc=12V, VADJ = 12V, CCOMP = 5nF to GND, RCGA = 16kΩ, unless otherwise specified;
VSENSE = IL * RSENSE, RG1 = RG2 = 200Ω)
5/20
L6615(*) Mirror accuracy is defined as :
and it represents the accuracy of the transfer between the voltage sensed and the voltage imposed on the
share bus.
BLOCK DIAGRAM
ELECTRICAL CHARACTERISTCS (continued)(Tj = -40 to 85°C, Vcc=12V, VADJ = 12V, CCOMP = 5nF to GND, RCGA = 16kΩ, unless otherwise specified;
VSENSE = IL * RSENSE, RG1 = RG2 = 200Ω)SH SENSE
RCGAG
---------------⋅
----------------------- ---------------------1–
100⋅
L6615 6/20
Figure 1. Turn-on and turn-off voltage
Figure 2. Supply current vs. supply voltage
Figure 3. Supply current
Figure 4. Max CGA current
Figure 5. High side/low side sensing
switchover threshold
Figure 6. Max. share bus voltage at no load
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L6615
Figure 7. Share bus input impedance Figure 8. ADJ maximum current
L6615 8/20
APPLICATION INFORMATION
Index page Introduction 8
Current sense section 9
Share drive section, error amplifier and adjust amplifier 10
Designing with L6615 10
Current sense methods 13
Application ideas 14
Low voltage buses 15
Offset Trimming 15
INTRODUCTIONPower supply systems are often designed by paralleling converters in order to improve performance and
reliability.
To ensure uniform distribution of stresses, the total load current should be shared appropriately among
the converters.
A typical application is showed in fig. 9 for a series of N paralleled modules (PS#1 to PS#N): each of them
exhibits 4 terminals: two for the power output (+OUT, -OUT) and two for the remote sense signals
(+OUT_S, -OUT_S).
On the power lines are placed the sense resistors RSENSE (for the current sensing) and the OR-ing diodes
(to avoid that the failure of one module shorts the load out)
L6615 allows attaining an automatic master-slave current sharing architecture: one L6615 is associated to each
power supply and all these IC's are linked each other through the share bus (referred to the common ground).
This kind of system configuration is preferred to the systems in which a single current sharing controller is
used because of robustness, reliability and flexibility.
To configure a load share controller, few passive components are used. A brief device explanation will
follow with the formulas useful to set these external components.
Figure 9. Typical high side connection
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L6615 CURRENT SENSE SECTIONA sense resistor is typically used to generate the voltage drop, proportional to the load current, measured
by the CSA (Current Sense Amplifier), whose input pins (pins #2 and #3) are connected across of RSENSE
through two identical resistors (RG1 and RG2).
The CSA consists of 2 sections (see fig. 10), one responsible for the high side sensing, the other for low
side sensing. An internal comparator activates the relevant section in accordance with the voltage present
at CS+ pin: if this voltage is higher than 1.6V (typ), then the high side sensing section will be activated
(fig10.a) otherwise the low side sensing one will (fig 10.b). For the sake of simplicity we will consider RG1=
RG2= RG.
As the voltage drop IOUT*RSENSE is present at the input of the Sense Amplifier section, its output forces
the controlled current mirror to: sink current from the CS+ pin in case of high side sensing (neglecting input bias current, no current flows
through CS- pin); source current from the CS- pin in case of low side sensing (neglecting input bias current, no current
flows through CS- pin).
The local feedback imposes the same voltage at the current sense input pins, so under closed loop con-
dition VSENSE=VRG.
The current
(ICS+ in case of high side, ICS- in case of low side) is then internally mirrored and sent to the CGA pin caus-
ing a drop across the RCGA external resistor: two internal buffers transfer VCGA signal on the share pin so:
Only the L6615 VCC limits the upper voltage at the CGA and SH pin, independently of the voltage present
at the current sense pins.
In noisy applications, two capacitors of small value (e.g. 1nF) connected between current sense pins and
ground could be useful to clean the signal at the input of the current sense amplifier.
For low voltage buses application, see paragraph 7.
Figure 10. Current sense sectionCS OUT R SENSE⋅ -----------------------------------------=SH SNSG
----- --------- R CGA⋅=
L6615 10/20
SHARE DRIVE SECTION, ERROR AMPLIFIER AND ADJUST AMPLIFIERThe gain between the output of CSA (CGA pin) and output of SDA (SH pin) is 1 (typ.) so, for the master
power supply, VCGA = VSH; the voltage on the share bus is imposed by the master.
In the slave converters, being VCGA(SLAVE) < VCGA(MASTER), the diode at the output of SDA (see block
diagram) isolates the output this amplifier from the share bus.
The Share Sense Amplifier (SSA) reads the bus voltage transferring the signal to the non-inverting input
of the error amplifier where it is compared with CGA voltage.
Whenever a controller acts as the master in the system, the voltage difference between the E/A inputs is
zero. To guarantee its output low in such condition, a 40mV offset is inserted in series with the inverting
input.
Instead in the slave converters the input voltage difference is proportional to the difference between the
master load current and the relevant slave load current.
The transconductance E/A converts the ΔV at its inputs in a current equal to
flowing in the compensation network connected between COMP pin and ground.
The E/A output voltage drives the adjust amplifier to sink current from the ADJ pin that is connected to the
output voltage through a small resistor along the sense path. The current sunk by ADJ pin is deviated from
feedback path of the slave power supply that reacts increasing its duty cycle.
In steady state the current sunk by the ADJ pin is proportional to the value of error amplifier output.
DESIGNING WITH L6615The first design step is usually the choice of the sense resistor whose maximum value is limited by power
dissipation; this constraint must be traded off against the precision of L6615 current sensing. In fact a small
sense resistance value lowers the power dissipation but reduces the signal available at the inputs of the
L6615 current sense amplifier.
Once fixed RSENSE then the values for RG and RGCA will be chosen in accordance with the application
specs: usually these specs define the share bus voltage (VSH(MAX)) and the number of paralleled power
supplies.
Their value must comply with the constraints imposed by the L6615:
Figure 11. Simplified feedback block diagram. OUT GM ΔV⋅=
