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L6382D5STMN/a1355avaiPOWER MANAGEMENT UNIT FOR MICROCONTROLLED BALLAST


L6382D5 ,POWER MANAGEMENT UNIT FOR MICROCONTROLLED BALLASTBlock DiagramPFCCIRCUITBOOTSTRAPACCHARGEHVMAINSPUMPSTART-UPREGULATORHBTLDRIVER5VPFC PROTECTIONDRIVE ..
L6382DTR ,Power Management Unit for Microcontrolled BallastFeaturesembedding a PFC stage and a half-bridge stage. The L6382D includes 4 MOSFET driving stages ..
L6384 ,HIGH-VOLTAGE HALF BRIDGE DRIVERL6384®HIGH-VOLTAGE HALF BRIDGE DRIVERHIGH VOLTAGE RAIL UP TO 600 VdV/dt IMMUNITY +- 50 V/nsec IN FU ..
L6384. ,HIGH-VOLTAGE HALF BRIDGE DRIVERL6384®HIGH-VOLTAGE HALF BRIDGE DRIVERHIGH VOLTAGE RAIL UP TO 600 VdV/dt IMMUNITY +- 50 V/nsec IN FU ..
L6384.. ,HIGH-VOLTAGE HALF BRIDGE DRIVERBLOCK DIAGRAMH.V.VCC2V8 BOOTBOOTSTRAP DRIVERHVG CUV BOOTDRIVERDETECTIONHVGRS 71 OUTIN LOGIC LOAD6LE ..
L6384D ,HIGH-VOLTAGE HALF BRIDGE DRIVERL6384®HIGH-VOLTAGE HALF BRIDGE DRIVERHIGH VOLTAGE RAIL UP TO 600 VdV/dt IMMUNITY +- 50 V/nsec IN FU ..
LC35256DM-10 ,Dual control pins: OE and CE 256K (32768word x 8bit) SRAMFeatures3187-SOP28D• Supply voltage range: 2.7 to 5.5 V[LC35256DM]— 5-V operation: 5.0 V±10%— 3-V o ..
LC35256DM-70 ,Dual control pins: OE and CE 256K (32768word x 8bit) SRAMOrdering number : EN5823CMOS IC LC35256D-10, LC35256DM, DT-70/10Dual Control Pins: OE and CE256K ( ..
LC35256DT-10 ,Dual Control Pins: OE and CE 256K (32768-word X 8-bit) SRAMFeatures3187-SOP28D• Supply voltage range: 2.7 to 5.5 V[LC35256DM]— 5-V operation: 5.0 V±10%— 3-V o ..
LC35256FM-55U ,55ns; V(cc): 7.0V; V(in): -0.3 to +0.3V; 256K (32768 words x 8 bits) SRAM control pins: OE and CEAbsolute Maximum RatingsParameter Symbol Conditions Ratings UnitMaximum supply voltage V max 7.0 VC ..
LC35256FM70U ,70ns; V(cc): 7.0V; V(in): -0.3 to +0.3V; 256K (32768 words x 8 bits) SRAM control pins: OE and CEElectrical Characteristics at Ta = –40 to +85°C, V = 4.5 to 5.5 VCCRatingsParameter Symbol Conditio ..
LC35256FM-70U ,70ns; V(cc): 7.0V; V(in): -0.3 to +0.3V; 256K (32768 words x 8 bits) SRAM control pins: OE and CEOrdering number : ENN*6302CMOS ICLC35256FM, FT-55U/70U256K (32768 words · 8 bits) SRAMControl Pins: ..


L6382D5
POWER MANAGEMENT UNIT FOR MICROCONTROLLED BALLAST
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L6382D5

January 2005 FEATURES INTEGRATED HIGH-VOLTAGE START-UP 4 DRIVERS FOR PFC, HALF-BRIDGE & PRE-
HEATING MOSFETS FULLY INTEGRATE POWER MANAGEMENT
FOR ALL OPERATING MODES 5V MICROCONTROLLER COMPATIBLE INTERNAL TWO POINT Vcc REGULATOR OVER-CURRENT PROTECTION WITH
DIGITAL OUTPUT SIGNAL CROSS-CONDUCTION PROTECTION
(INTERLOCKING) UNDER VOLTAGE LOCK OUT INTEGRATED BOOTSTRAP DIODE APPLICATIONS DIMMABLE/NON-DIMMABLE BALLST DESCRIPTION
Designed in High-voltage BCD Off-line technolo-
gy, the L6382D5 is provided with 4 inputs pin and
a high voltage start-up generator conceived for ap-
plications managed by a microcontroller. It allows
the designer to use the same ballast circuit for dif-
ferent lamp wattage/type by simply changing the
µC software.
The digital input pins - able to receive signals up to
400KHz - are connected to level shifters that pro-
vide the control signals to their relevant drivers; in
particular the L6382D5 embeds one driver for the
PFC pre-regulator stage, two drivers for the ballast
POWER MANAGEMENT UNIT FOR MICROCONTROLLED
BALLAST
Figure 2. Block Diagram

Rev. 1
L6382D5
half-bridge stage (High Voltage, including also the bootstrap function) and the last one to provide supple-
mentary features like preheating of filaments supplied through isolated filaments in dimmable applications.
A precise reference voltage (+5V ±1%) able to provide up to 30mA is available to supply the µC in oper-
ating mode. Instead, during start-up and save mode the current available at VREF is up to 10mA and it is
provided by the internal high voltage start-up generator.
The chip has been conceived with advanced power management logic to minimize power losses and in-
crease the application reliability.
In the half-bridge section, a patented integrated bootstrap section replaces the external bootstrap diode.
The L6382D5 integrates also a function that regulates the IC supply voltage (without the need of any ex-
ternal charge pump) and optimizes the current consumption.
Figure 3. Pin Connection (Top View)
Figure 4. Typical System Block Diagram
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L6382D5
Table 2. Pin Functions
L6382D5
Table 3. Absolute Maximum Ratings

(*) excluding operating mode
Table 4. Thermal Data
Table 2. Pin Functions (continued)
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L6382D5
Table 5. Electrical Characteristcs (Tj = 25°C, VCC=12V unless otherwise specified)
L6382D5
Table 5. Electrical Characteristcs (continued)Table 5. Electrical Characteristcs (continued)
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L6382D5

Notes:1. Specification over the -40°C to +125°C junction temperature range are ensured by design, characterization and statistical corre-
lation.
Table 5. Electrical Characteristcs (continued)
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