IC Phoenix
 
Home ›  LL3 > L6226D-L6226DTR-L6226N-L6226PD,DUAL DMOS FULL BRIDGE MOTOR DRIVER
L6226D-L6226DTR-L6226N-L6226PD Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
L6226DSTMN/a1379avaiDUAL DMOS FULL BRIDGE MOTOR DRIVER
L6226DTRSTN/a15avaiDMOS DUAL FULL BRIDGE DRIVER
L6226NSTN/a12avaiDMOS DUAL FULL BRIDGE DRIVER
L6226NSTMN/a12avaiDMOS DUAL FULL BRIDGE DRIVER
L6226PDSTMN/a269avaiDMOS DUAL FULL BRIDGE DRIVER


L6226D ,DUAL DMOS FULL BRIDGE MOTOR DRIVERfeatures thermal shutdown and a non-dissipa-DESCRIPTIONtive overcurrent detection on the high side ..
L6226DTR ,DMOS DUAL FULL BRIDGE DRIVERABSOLUTE MAXIMUM RATINGSSymbol Parameter Test conditions Value UnitSupply Voltage V = V = V 60 VVS ..
L6226N ,DMOS DUAL FULL BRIDGE DRIVERL6226DMOS DUAL FULL BRIDGE DRIVER■ OPERATING SUPPLY VOLTAGE FROM 8 TO 52V■ 2.8A OUTPUT PEAK CURRENT ..
L6226N ,DMOS DUAL FULL BRIDGE DRIVERAPPLICATIONSPower Transistors with CMOS and bipolar circuits on■ BIPOLAR STEPPER MOTORthe same chip ..
L6226PD ,DMOS DUAL FULL BRIDGE DRIVERBLOCK DIAGRAMVBOOTVBOOTVSAV VBOOT BOOTCHARGEVCPPUMPPROGCLAOVEROCD OCD CURRENTA ADETECTIONOUT1AOUT2A ..
L6226Q ,PowerSPIN: DMOS dual full bridge driverFeatures■ Operating supply voltage from 8 to 52 V■ 2.8 A output peak current (1.4 A DC)■ R 0.73 Ω t ..
LC321664AJ ,1 MEG (65536 words X 16 bits) DRAM Fast Page Mode, Byte WriteFeatures• 65536-word · 16-bit configurationSANYO:SOJ40• Single 5 V ±10% power supply• All input and ..
LC321664AJ-80 ,1MEG (65536words x 16bit) DRAM fast page mode, byte writeAbsolute Maximum RatingsParameter Symbol Ratings Unit NoteMaximum supply voltage V max –1.0 to +7.0 ..
LC321664AM-80 ,1MEG (65536words x 16bit) DRAM fast page mode, byte writeFeatures• 65536-word · 16-bit configurationSANYO:SOJ40• Single 5 V ±10% power supply• All input and ..
LC321664BJ ,1 MEG (65536 words X 16 bits) DRAM Fast Page Mode, Byte WriteFeatures. 65536 words M 16 bits configuration,. Single 5 V , 10% power supply.. All input and outpu ..
LC321664BJ-70 ,1 MEG (65536 words x 16 bit) DRAM, fast page mode, byte writeFeatures. 65536 words M 16 bits configuration,. Single 5 V , 10% power supply.. All input and outpu ..
LC321664BJ-80 ,1 MEG (65536 words x 16 bit) DRAM fast page mode, byte writeOrdering number : EN5082AOve rviewThe LC321664BJ, BM, BT is a CMOS dynamic RAMoperating on a single ..


L6226D-L6226DTR-L6226N-L6226PD
DMOS DUAL FULL BRIDGE DRIVER
1/22
L6226

September 2003 OPERATING SUPPLY VOLTAGE FROM 8 TO 52V 2.8A OUTPUT PEAK CURRENT (1.4A DC) RDS(ON) 0.73Ω TYP. VALUE @ Tj = 25 °C OPERATING FREQUENCY UP TO 100KHz PROGRAMMABLE HIGH SIDE OVERCURRENT
DETECTION AND PROTECTION DIAGNOSTIC OUTPUT PARALLELED OPERATION CROSS CONDUCTION PROTECTION THERMAL SHUTDOWN UNDER VOLTAGE LOCKOUT INTEGRATED FAST FREE WHEELING DIODES
TYPICAL APPLICATIONS
BIPOLAR STEPPER MOTOR DUAL OR QUAD DC MOTOR
DESCRIPTION

The L6226 is a DMOS Dual Full Bridge designed for
motor control applications, realized in MultiPower-
BCD technology, which combines isolated DMOS
Power Transistors with CMOS and bipolar circuits on
the same chip. Available in PowerDIP24 (20+2+2),
PowerSO36 and SO24 (20+2+2) packages, the
L6226 features thermal shutdown and a non-dissipa-
tive overcurrent detection on the high side Power
MOSFETs plus a diagnostic output that can be easily
used to implement the overcurrent protection.
BLOCK DIAGRAM

DMOS DUAL FULL BRIDGE DRIVER
L6226
2/22
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
3/22
L6226
THERMAL DATA
PIN CONNECTIONS (Top View)

(5) The slug is internally connected to pins 1,18,19 and 36 (GND pins).
(1) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the bottom side of 6 cm2 (with a thickness of 35 μm).
(2) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6 cm2 (with a thickness of 35 μm).
(3) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6 cm2 (with a thickness of 35 μm), 16 via holes
and a ground layer.
(4) Mounted on a multi-layer FR4 PCB without any heat sinking surface on the board.
L6226
4/22
PIN DESCRIPTION
5/22
L6226
ELECTRICAL CHARACTERISTICS

(Tamb = 25 °C, Vs = 48V, unless otherwise specified)
Output DMOS Transistors
Source Drain Diodes
Logic Input
PIN DESCRIPTION (continued)
L6226
6/22
(6) Tested at 25°C in a restricted range and guaranteed by characterization.
(7) See Fig. 1.
(8) See Fig. 2.
Switching Characteristics
Over Current Detection
ELECTRICAL CHARACTERISTICS (continued)

(Tamb = 25 °C, Vs = 48V, unless otherwise specified)
7/22
L6226
Figure 2. Overcurrent Detection Timing Definition
L6226
8/22
CIRCUIT DESCRIPTION
POWER STAGES and CHARGE PUMP

The L6226 integrates two independent Power MOS
Full Bridges. Each Power MOS has an Rd-
son=0.73ohm (typical value @ 25°C), with intrinsic
fast freewheeling diode. Cross conduction protection
is achieved using a dead time (td = 1μs typical) be-
tween the switch off and switch on of two Power MOS
in one leg of a bridge.
Using N Channel Power MOS for the upper transis-
tors in the bridge requires a gate drive voltage above
the power supply voltage. The Bootstrapped (Vboot)
supply is obtained through an internal Oscillator and
few external components to realize a charge pump
circuit as shown in Figure 3. The oscillator output
(VCP) is a square wave at 600kHz (typical) with 10V
amplitude. Recommended values/part numbers for
the charge pump circuit are shown in Table1.
Table 1. Charge Pump External Components
Values
Figure 3. Charge Pump Circuit
LOGIC INPUTS

Pins IN1A, IN2A, IN1B, IN2B, ENA and ENB are TTL/
CMOS and uC compatible logic inputs. The internal
structure is shown in Fig. 4. Typical value for turn-on
and turn-off thresholds are respectively Vthon=1.8V
and Vthoff = 1.3V.
Pins ENA and ENB are commonly used to implement
Overcurrent and Thermal protection by connecting
them respectively to the outputs OCDA and OCDB,
which are open-drain outputs. If that type of connec-
tion is chosen, some care needs to be taken in driving
these pins. Two configurations are shown in Fig. 5
and Fig. 6. If driven by an open drain (collector) struc-
ture, a pull-up resistor REN and a capacitor CEN are
connected as shown in Fig. 5. If the driver is a stan-
dard Push-Pull structure the resistor REN and the ca-
pacitor CEN are connected as shown in Fig. 6. The
resistor REN should be chosen in the range from
2.2kΩ to 180KΩ. Recommended values for REN and
CEN are respectively 100KΩ and 5.6nF. More infor-
mation on selecting the values is found in the Over-
current Protection section.
Figure 4. Logic Inputs Internal Structure
Figure 6. ENA and ENB Pins Push-Pull Driving
TRUTH TABLE
= Don't care
High Z = High Impedance Output
9/22
L6226
NON-DISSIPATIVE OVERCURRENT DETECTION AND PROTECTION

In addition to the PWM current control, an overcurrent detection circuit (OCD) is integrated. This circuit can be
used to provides protection against a short circuit to ground or between two phases of the bridge as well as a
roughly regulation of the load current. With this internal over current detection, the external current sense resis-
tor normally used and its associated power dissipation are eliminated. Fig. 7 shows a simplified schematic of
the overcurrent detection circuit for the Bridge A. Bridge B is provided of an analogous circuit.
To implement the over current detection, a sensing element that delivers a small but precise fraction of the out-
put current is implemented with each high side power MOS. Since this current is a small fraction of the output
current there is very little additional power dissipation. This current is compared with an internal reference cur-
rent IREF. When the output current reaches the detection threshold Isover the OCD comparator signals a fault
condition. When a fault condition is detected, an internal open drain MOS with a pull down capability of 4mA
connected to OCD pin is turned on. Fig. 8 shows the OCD operation.
This signal can be used to regulate the output current simply by connecting the OCD pin to EN pin and adding
an external R-C as shown in Fig.7. The off time before recovering normal operation can be easily programmed
by means of the accurate thresholds of the logic inputs.
IREF and, therefore, the output current detection threshold are selectable by RCL value, following the equations: Isover = 2.8A ±30% at -25°C < Tj < 125°C if RCL = 0Ω (PROGCL connected to GND) Isover = ±10% at -25°C < Tj < 125°C if 5KΩ < RC < 40kΩ
Fig. 9 shows the output current protection threshold versus RCL value in the range 5kΩ to 40kΩ.
The Disable Time tDISABLE before recovering normal operation can be easily programmed by means of the accu-
rate thresholds of the logic inputs. It is affected whether by CEN and REN values and its magnitude is reported in
Figure 10. The Delay Time tDELAY before turning off the bridge when an overcurrent has been detected depends
only by CEN value. Its magnitude is reported in Figure 11.
CEN is also used for providing immunity to pin EN against fast transient noises. Therefore the value of CEN should
be chosen as big as possible according to the maximum tolerable Delay Time and the REN value should be chosen
according to the desired Disable Time.
The resistor REN should be chosen in the range from 2.2KΩ to 180KΩ. Recommended values for REN and CEN
are respectively 100KΩ and 5.6nF that allow obtaining 200μs Disable Time.
11050CL
----- -----------
L6226
10/22
Figure 7. Overcurrent Protection Simplified Schematic
11/22
L6226
Figure 9. Output Current Protection Threshold versus RCL Value
Figure 10. tDISABLE versus CEN and REN (VDD = 5V).
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED