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L6208STN/a1avaiDMOS DRIVER FOR BIPOLAR STEPPER MOTOR
L6208D013TRSTN/a7avaiDMOS DRIVER FOR BIPOLAR STEPPER MOTOR
L6208PD013TRST,STN/a10000avaiDMOS DRIVER FOR BIPOLAR STEPPER MOTOR
L6208PD013TRSTMN/a10000avaiDMOS DRIVER FOR BIPOLAR STEPPER MOTOR


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L6208-L6208D013TR-L6208PD013TR
DMOS DRIVER FOR BIPOLAR STEPPER MOTOR
1/27
L6208

September 2003 OPERATING SUPPLY VOLTAGE FROM 8 TO 52V 5.6A OUTPUT PEAK CURRENT (2.8A RMS) RDS(ON) 0.3Ω TYP. VALUE @ Tj = 25°C OPERATING FREQUENCY UP TO 100KHz NON DISSIPATIVE OVERCURRENT
PROTECTION DUAL INDEPENDENT CONSTANT tOFF PWM
CURRENT CONTROLLERS FAST/SLOW DECAY MODE SELECTION FAST DECAY QUASI-SYNCHRONOUS
RECTIFICATION DECODING LOGIC FOR STEPPER MOTOR
FULL AND HALF STEP DRIVE CROSS CONDUCTION PROTECTION THERMAL SHUTDOWN UNDER VOLTAGE LOCKOUT INTEGRATED FAST FREE WHEELING DIODES
TYPICAL APPLICATIONS
BIPOLAR STEPPER MOTOR
DESCRIPTION

The L6208 is a DMOS Fully Integrated Stepper Motor
Driver with non-dissipative Overcurrent Protection,
realized in MultiPower-BCD technology, which com-
bines isolated DMOS Power Transistors with CMOS
and bipolar circuits on the same chip. The device in-
cludes all the circuitry needed to drive a two-phase
bipolar stepper motor including: a dual DMOS Full
Bridge, the constant off time PWM Current Controller
that performs the chopping regulation and the Phase
Sequence Generator, that generates the stepping
sequence. Available in PowerDIP24 (20+2+2),
PowerSO36 and SO24 (20+2+2) packages, the
L6208 features a non-dissipative overcurrent protec-
tion on the high side Power MOSFETs and thermal
shutdown.
BLOCK DIAGRAM

DMOS DRIVER FOR BIPOLAR STEPPER MOTOR
L6208
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ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
3/27
L6208
THERMAL DATA
PIN CONNECTIONS (Top View)

(5) The slug is internally connected to pins 1,18,19 and 36 (GND pins).
(1) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the bottom side of 6cm2 (with a thickness of 35μm).
(2) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6cm2 (with a thickness of 35μm).
(3) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6cm2 (with a thickness of 35μm), 16 via holes
and a ground layer.
(4) Mounted on a multi-layer FR4 PCB without any heat sinking surface on the board.
L6208
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PIN DESCRIPTION
5/27
L6208

(6) Also connected at the output drain of the Over current and Thermal protection MOSFET. Therefore, it has to be driven putting in series
a resistor with a value in the range of 2.2KΩ - 180KΩ, recommended 100KΩ.
ELECTRICAL CHARACTERISTICS

(Tamb = 25°C, Vs = 48V, unless otherwise specified)
Output DMOS Transistors
Source Drain Diodes
Logic Inputs (EN, CONTROL, HALF/FULL, CLOCK, RESET, CW/CCW)
PIN DESCRIPTION (continued)
L6208
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Switching Characteristics
PWM Comparator and Monostable
ELECTRICAL CHARACTERISTICS (continued)

(Tamb = 25°C, Vs = 48V, unless otherwise specified)
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L6208

(7) Tested at 25°C in a restricted range and guaranteed by characterization.
(8) See Fig. 1.
(9) See Fig. 2.
(10) See Fig. 3.
(11) See Fig. 4.
(12) Measured applying a voltage of 1V to pin SENSE and a voltage drop from 2V to 0V to pin VREF.
(13) See Fig. 5.
Figure 1. Switching Characteristic Definition
Over Current Protection
ELECTRICAL CHARACTERISTICS (continued)

(Tamb = 25°C, Vs = 48V, unless otherwise specified)
L6208
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Figure 2. Clock to Output Delay Time
Figure 3. Minimum Timing Definition; Clock Input
Figure 4. Minimum Timing Definition; Logic Inputs
9/27
L6208
Figure 5. Overcurrent Detection Timing Definition
CIRCUIT DESCRIPTION
POWER STAGES and CHARGE PUMP

The L6208 integrates two independent Power MOS Full Bridges. Each Power MOS has an RDS(ON) = 0.3Ω (typ-
ical value @ 25°C), with intrinsic fast freewheeling diode. Switching patterns are generated by the PWM Current
Controller and the Phase Sequence Generator (see below). Cross conduction protection is achieved using a
dead time (tDT = 1μs typical value) between the switch off and switch on of two Power MOSFETSs in one leg of
a bridge.
Pins VSA and VSB MUST be connected together to the supply voltage VS. The device operates with a supply
voltage in the range from 8V to 52V. It has to be noticed that the RDS(ON) increases of some percents when the
supply voltage is in the range from 8V to 12V (see Fig. 34 and 35).
Using N-Channel Power MOS for the upper transistors in the bridge requires a gate drive voltage above the
power supply voltage. The bootstrapped supply voltage VBOOT is obtained through an internal Oscillator and few
external components to realize a charge pump circuit as shown in Figure 6. The oscillator output (VCP) is a
square wave at 600KHz (typical) with 10V amplitude. Recommended values/part numbers for the charge pump
circuit are shown in Table 1.
Table 1. Charge Pump External Components Values
L6208
10/27
Figure 6. Charge Pump Circuit
LOGIC INPUTS

Pins CONTROL, HALF/FULL, CLOCK, RESET and CW/CCW are TTL/CMOS and uC compatible logic inputs.
The internal structure is shown in Fig. 7. Typical value for turn-on and turn-off thresholds are respectively
Vth(ON)= 1.8V and Vth(OFF)= 1.3V.
Pin EN (Enable) has identical input structure with the exception that the drain of the Overcurrent and thermal
protection MOSFET is also connected to this pin. Due to this connection some care needs to be taken in driving
this pin. The EN input may be driven in one of two configurations as shown in Fig. 8 or 9. If driven by an open
drain (collector) structure, a pull-up resistor REN and a capacitor CEN are connected as shown in Fig. 8. If the
driver is a standard Push-Pull structure the resistor REN and the capacitor CEN are connected as shown in Fig.
9. The resistor REN should be chosen in the range from 2.2KΩ to 180KΩ. Recommended values for REN and
CEN are respectively 100KΩ and 5.6nF. More information on selecting the values is found in the Overcurrent
Protection section.
Figure 7. Logic Inputs Internal Structure
Figure 8. EN Pin Open Collector Driving
Figure 9. EN Pin Push-Pull Driving
11/27
L6208
PWM CURRENT CONTROL

The L6208 includes a constant off time PWM current controller for each of the two bridges. The current control
circuit senses the bridge current by sensing the voltage drop across an external sense resistor connected be-
tween the source of the two lower power MOS transistors and ground, as shown in Figure 10. As the current in
the motor builds up the voltage across the sense resistor increases proportionally. When the voltage drop
across the sense resistor becomes greater than the voltage at the reference input (VREFA or VREFB) the sense
comparator triggers the monostable switching the bridge off. The power MOS remain off for the time set by the
monostable and the motor current recirculates as defined by the selected decay mode, described in the next
section. When the monostable times out the bridge will again turn on. Since the internal dead time, used to pre-
vent cross conduction in the bridge, delays the turn on of the power MOS, the effective off time is the sum of the
monostable time plus the dead time.
Figure 10. PWM Current Controller Simplified Schematic

Figure 11 shows the typical operating waveforms of the output current, the voltage drop across the sensing re-
sistor, the RC pin voltage and the status of the bridge. More details regarding the Synchronous Rectification and
the output stage configuration are included in the next section.
Immediately after the Power MOS turns on, a high peak current flows through the sensing resistor due to the
reverse recovery of the freewheeling diodes. The L6208 provides a 1μs Blanking Time tBLANK that inhibits the
comparator output so that this current spike cannot prematurely re-trigger the monostable.
L6208
12/27
Figure 11. Output Current Regulation Waveforms

Figure 12 shows the magnitude of the Off Time tOFF versus COFF and ROFF values. It can be approximately
calculated from the equations:
tRCFALL = 0.6 · ROFF · COFF
tOFF = tRCFALL + tDT = 0.6 · ROFF · COFF + tDT
where ROFF and COFF are the external component values and tDT is the internally generated Dead Time with:
20KΩ ≤ ROFF ≤ 100KΩ
0.47nF ≤ COFF ≤ 100nF
tDT = 1μs (typical value)
Therefore:
tOFF(MIN) = 6.6μs
tOFF(MAX) = 6ms
These values allow a sufficient range of tOFF to implement the drive circuit for most motors.
The capacitor value chosen for COFF also affects the Rise Time tRCRISE of the voltage at the pin RCOFF. The
Rise Time tRCRISE will only be an issue if the capacitor is not completely charged before the next time the
monostable is triggered. Therefore, the on time tON, which depends by motors and supply parameters, has to
be bigger than tRCRISE for allowing a good current regulation by the PWM stage. Furthermore, the on time tON
can not be smaller than the minimum on time tON(MIN).
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L6208

tRCRISE = 600 · COFF
Figure 13 shows the lower limit for the on time tON for having a good PWM current regulation capacity. It has to
be said that tON is always bigger than tON(MIN) because the device imposes this condition, but it can be smaller
than tRCRISE - tDT. In this last case the device continues to work but the off time tOFF is not more constant.
So, small COFF value gives more flexibility for the applications (allows smaller on time and, therefore, higher
switching frequency), but, the smaller is the value for COFF, the more influential will be the noises on the circuit
performance.
Figure 12. tOFF versus COFF and ROFF
Figure 13. Area where tON can vary maintaining the PWM regulation.
ONtON MIN() >1.5μs (typ. value)=ONt RCRISEtDT–>
L6208
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DECAY MODES

The CONTROL input is used to select the behavior of the bridge during the off time. When the CONTROL pin
is low, the Fast Decay mode is selected and both transistors in the bridge are switched off during the off time.
When the CONTROL pin is high, the Slow Decay mode is selected and only the low side transistor of the bridge
is switched off during the off time.
Figure 14 shows the operation of the bridge in the Fast Decay mode. At the start of the off time, both of the
power MOS are switched off and the current recirculates through the two opposite free wheeling diodes. The
current decays with a high di/dt since the voltage across the coil is essentially the power supply voltage. After
the dead time, the lower power MOS in parallel with the conducting diode is turned on in synchronous rectifica-
tion mode. In applications where the motor current is low it is possible that the current can decay completely to
zero during the off time. At this point if both of the power MOS were operating in the synchronous rectification
mode it would then be possible for the current to build in the opposite direction. To prevent this only the lower
power MOS is operated in synchronous rectification mode. This operation is called Quasi-Synchronous Recti-
fication Mode. When the monostable times out, the power MOS are turned on again after some delay set by the
dead time to prevent cross conduction.
Figure 15 shows the operation of the bridge in the Slow Decay mode. At the start of the off time, the lower power
MOS is switched off and the current recirculates around the upper half of the bridge. Since the voltage across
the coil is low, the current decays slowly. After the dead time the upper power MOS is operated in the synchro-
nous rectification mode. When the monostable times out, the lower power MOS is turned on again after some
delay set by the dead time to prevent cross conduction.
Figure 14. Fast Decay Mode Output Stage Configurations
Figure 15. Slow Decay Mode Output Stage Configurations
STEPPING SEQUENCE GENERATION

The phase sequence generator is a state machine that provides the phase and enable inputs for the two bridges
to drive a stepper motor in either full step or half step. Two full step modes are possible, the Normal Drive Mode
where both phases are energized each step and the Wave Drive Mode where only one phase is energized at a
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