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L6206DSTMN/a96avaiDUAL DMOS FULL BRIDGE MOTOR DRIVER
L6206NSTMN/a1200avaiDUAL DMOS FULL BRIDGE MOTOR DRIVER
L6206PDSTN/a3avaiDUAL DMOS FULL BRIDGE MOTOR DRIVER


L6206N ,DUAL DMOS FULL BRIDGE MOTOR DRIVERABSOLUTE MAXIMUM RATINGSSymbol Parameter Test conditions Value UnitV Supply Voltage 60 VSV ,V Input ..
L6206PD ,DUAL DMOS FULL BRIDGE MOTOR DRIVERL6206DMOS DUAL FULL BRIDGE DRIVER■ OPERATING SUPPLY VOLTAGE FROM 8 TO 52V■ 5.6A OUTPUT PEAK CURRENT ..
L6206PD013TR ,DMOS DUAL FULL BRIDGE DRIVERABSOLUTE MAXIMUM RATINGSSymbol Parameter Test conditions Value UnitV Supply Voltage V = V = V 60 VS ..
L6207 ,DMOS DUAL FULL BRIDGE DRIVER WITH PWM CURRENT CONTROLLERBLOCK DIAGRAMVBOOTVBOOTVSAV VBOOT BOOTCHARGEVCPPUMPOVEROCDACURRENTDETECTIONOUT1AOUT2A10V 10VTHERMAL ..
L6207D ,DUAL DMOS FULL BRIDGE MOTOR DRIVERABSOLUTE MAXIMUM RATINGSSymbol Parameter Test conditions Value UnitV Supply Voltage 60 VSV ,V Input ..
L6207D013TR ,DMOS DUAL FULL BRIDGE DRIVER WITH PWM CURRENT CONTROLLERL6207DMOS DUAL FULL BRIDGE DRIVERWITH PWM CURRENT CONTROLLER■ OPERATING SUPPLY VOLTAGE FROM 8 TO 52 ..
LC321664AJ ,1 MEG (65536 words X 16 bits) DRAM Fast Page Mode, Byte WriteFeatures• 65536-word · 16-bit configurationSANYO:SOJ40• Single 5 V ±10% power supply• All input and ..
LC321664AJ-80 ,1MEG (65536words x 16bit) DRAM fast page mode, byte writeAbsolute Maximum RatingsParameter Symbol Ratings Unit NoteMaximum supply voltage V max –1.0 to +7.0 ..
LC321664AM-80 ,1MEG (65536words x 16bit) DRAM fast page mode, byte writeFeatures• 65536-word · 16-bit configurationSANYO:SOJ40• Single 5 V ±10% power supply• All input and ..
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LC321664BJ-80 ,1 MEG (65536 words x 16 bit) DRAM fast page mode, byte writeOrdering number : EN5082AOve rviewThe LC321664BJ, BM, BT is a CMOS dynamic RAMoperating on a single ..


L6206D-L6206N-L6206PD
DUAL DMOS FULL BRIDGE MOTOR DRIVER
1/21
L6206

April 2002 OPERATING SUPPLY VOLTAGE FROM 8 TO 52V 5.6A OUTPUT PEAK CURRENT (2.8A DC) RDS(ON) 0.3Ω TYP. VALUE @ Tj = 25 °C OPERATING FREQUENCY UP TO 100KHz PROGRAMMABLE HIGH SIDE OVERCURRENT
DETECTION AND PROTECTION DIAGNOSTIC OUTPUT PARALLELED OPERATION CROSS CONDUCTION PROTECTION THERMAL SHUTDOWN UNDER VOLTAGE LOCKOUT INTEGRATED FAST FREE WHEELING DIODES
TYPICAL APPLICATIONS
BIPOLAR STEPPER MOTOR DUAL OR QUAD DC MOTOR
DESCRIPTION

The L6206 is a DMOS Dual Full Bridge designed for
motor control applications, realized in MultiPower-
BCD technology, which combines isolated DMOS
Power Transistors with CMOS and bipolar circuits on
the same chip. Available in PowerDIP24 (20+2+2),
PowerSO36 and SO24 (20+2+2) packages, the
L6206 features thermal shutdown and a non-dissipa-
tive overcurrent detection on the high side Power
MOSFETs plus a diagnostic output that can be easily
used to implement the overcurrent protection.
BLOCK DIAGRAM

DMOS DUAL FULL BRIDGE DRIVER
L6206
2/21
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
3/21
L6206
THERMAL DATA
PIN CONNECTIONS (Top View)
Mounted on a multilayer FR4 PCB with a dissipating copper surface on the bottom side of 6 cm2 (with a thickness of 35 μm). Mounted on a multilayer FR4 PCB with a dissipating copper surface on the top side of 6 cm2 (with a thickness of 35 μm). Mounted on a multilayer FR4 PCB with a dissipating copper surface on the top side of 6 cm2 (with a thickness of 35 μm), 16 via holes
and a ground layer. Mounted on a multilayer FR4 PCB without any heat sinking surface on the board.
L6206
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PIN DESCRIPTION
5/21
L6206
ELECTRICAL CHARACTERISTICS

(Tamb = 25 °C, Vs = 48V, unless otherwise specified)
Output DMOS Transistors
Source Drain Diodes
Switching Characteristics
PIN DESCRIPTION (continued)
L6206
6/21
<(5)> See Fig. 1.
<(6)> See Fig. 2.
UVLO comp
Logic Input
Over Current Detection
ELECTRICAL CHARACTERISTICS (continued)

(Tamb = 25 °C, Vs = 48V, unless otherwise specified)
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L6206
Figure 1. Switching Characteristic Definition
Figure 2. Overcurrent Detection Timing Definition
L6206
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CIRCUIT DESCRIPTION
POWER STAGES and CHARGE PUMP

The L6206 integrates two independent Power MOS
Full Bridges. Each Power MOS has an Rd-
son=0.3ohm (typical value @25°C), with intrinsic fast
freewheeling diode. Cross conduction protection is
achieved using a dead time (td = 1μs typical) be-
tween the switch off and switch on of two Power MOS
in one leg of a bridge.
Using N Channel Power MOS for the upper transis-
tors in the bridge requires a gate drive voltage above
the power supply voltage. The Bootstrapped (Vboot)
supply is obtained through an internal Oscillator and
few external components to realize a charge pump
circuit as shown in Figure 3. The oscillator output
(VCP) is a square wave at 750kHz (typical) with 10V
amplitude. Recommended values/part numbers for
the charge pump circuit are shown in Table1.
Table 1. Charge Pump External Components
Values
Figure 3. Charge Pump Circuit
LOGIC INPUTS

Pins IN1A, IN2A, IN1B, IN2B, ENA and ENB are TTL/
CMOS and uC compatible logic inputs. The internal
structure is shown in Fig. 4. Typical value for turn-on
and turn-off thresholds are respectively Vthon=1.8V
and Vthoff = 1.3V.
Pins ENA and ENB are commonly used to implement
Overcurrent and Thermal protection by connecting
them respectively to the outputs OCDA and OCDB,
which are open-drain outputs. If that type of connec-
tion is chosen, some care needs to be taken in driving
these pins. Two configurations are shown in Fig. 5
and Fig. 6. If driven by an open drain (collector) struc-
ture, a pull-up resistor REN and a capacitor CEN are
connected as shown in Fig. 5. If the driver is a stan-
dard Push-Pull structure the resistor REN and the ca-
pacitor CEN are connected as shown in Fig. 6. The
resistor REN should be chosen in the range from
500Ω to 22KΩ. Recommended values for REN and
CEN are respectively 10KΩ and 100nF. More infor-
mation on selecting the values is found in the Over-
current Protection section.
Figure 4. Logic Inputs Internal Structure
Figure 5. ENA and ENB Pins Open Collector
Driving
Figure 6. ENA and ENB Pins Push-Pull Driving
TRUTH TABLE
= Don't care
High Z = High Impedance Output
9/21
L6206
NON-DISSIPATIVE OVERCURRENT DETECTION AND PROTECTION

In addition to the PWM current control, an overcurrent detection circuit (OCD) is integrated. This circuit can be
used to provides protection against a short circuit to ground or between two phases of the bridge as well as a
roughly regulation of the load current. With this internal over current detection, the external current sense resis-
tor normally used and its associated power dissipation are eliminated. Fig. 7 shows a simplified schematic of
the overcurrent detection circuit for the Bridge A. Bridge B is provided of an analogous circuit.
To implement the over current detection, a sensing element that delivers a small but precise fraction of the out-
put current is implemented with each high side power MOS. Since this current is a small fraction of the output
current there is very little additional power dissipation. This current is compared with an internal reference cur-
rent IREF. When the output current reaches the detection threshold Isover the OCD comparator signals a fault
condition. When a fault condition is detected, an internal open drain MOS with a pull down capability of 4mA
connected to OCD pin is turned on. Fig. 8 shows the OCD operation.
This signal can be used to regulate the output current simply by connecting the OCD pin to EN pin and adding
an external R-C as shown in Fig.7. The off time before recovering normal operation can be easily programmed
by means of the accurate thresholds of the logic inputs.
IREF and, therefore, the output current detection threshold are selectable by RCL value, following the equations: Isover = 5.6A ±30% at -25°C < Tj < 125°C if RCL = 0Ω (PROGCL connected to GND) Isover = ±10% at -25°C < Tj < 125°C if RC > 5KΩ
Fig. 9 shows the output current protection threshold versus RCL value in the range 5kΩ to 40kΩ.
Figure 7. Overcurrent Protection Simplified Schematic

22100CL
----- -----------
L6206
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Figure 8. Overcurrent Protection Waveforms
Figure 9. Output Current Protection Threshold versus RCL Value
11/21
L6206
APPLICATION INFORMATION

A typical application using L6206 is shown in Fig. 10. Typical component values for the application are shown
in Table 2. A high quality ceramic capacitor in the range of 100 to 200 nF should be placed between the power
pins (VSA and VSB) and ground near the L6206 to improve the high frequency filtering on the power supply and
reduce high frequency transients generated by the switching. The capacitors connected from the ENA/OCDA
and ENB/OCDB nodes to ground set the shut down time for the Brgidge A and Bridge B respectively when an
over current is detected (see Overcurrent Protection). The two current sources (SENSEA and SENSEB) should
be connected to Power Ground with a trace length as short as possible in the layout. To increase noise immu-
nity, unused logic pins are best connected to 5V (High Logic Level) or GND (Low Logic Level) (see pin descrip-
tion). It is recommended to keep Power Ground, Signal Ground and Charge Pump Ground (low side of CBOOT
capacitor) separated on PCB.
Table 2. Component Values for Typical Application
Figure 10. Typical Application
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