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IRFS4010IRN/a34avai100V Single N-Channel HEXFET Power MOSFET in a D2-Pak package


IRFS4010 ,100V Single N-Channel HEXFET Power MOSFET in a D2-Pak packageApplications DV100VDSSHigh Efficiency Synchronous Rectification in SMPSR typ.3.9m

IRFS4010
100V Single N-Channel HEXFET Power MOSFET in a TO-262 package
International PD-96186A
TOR Rectifier llRFS4010PbF
IRFSL4010PbF
HEXFET® Power MOSFET
Applications D
o High Efficiency Synchronous Rectification in SMPS Voss 100V
q Uninterruptible Power Supply RDS(on) typ. 3.9mf2
0 High Speed Power Switching
q Hard Switched and High Frequency Circuits G max. 4.7mf2
s ID 180A
Benefits
q Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness 7jiiiiy
o Fully Characterized Capacitance and Avalanche ''cti'iijr' 'Rr'. V
SOA l, S . . s
Enhanced body diode dV/dt and dI/dt Capability le' ‘GD
Lead-Free
D2Pak TO-262
lRFS4010PbF IRFSL4010PbF
Gate Drain Source
Absolute Maximum Ratings
Symbol Parameter Max. Units
'0 @ To = 25°C Continuous Drain Current, Ves @ 10V 180
ID © Tc = 100°C Continuous Drain Current, Vss @ 10V 127 A
IDM Pulsed Drain Current co 720
PD @Tc = 25°C Maximum Power Dissipation 375 W
Linear Derating Factor 2.5 W/°C
Vss Gate-to-Source Voltage 1 20 V
dv/dt Peak Diode Recovery © 31 V/ns
Tu Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300
(1.6mm from case)
Avalanche Characteristics
EAS(Thermally|imited) Single Pulse Avalanche Energy oo 318 mJ
IAF. Avalanche Current co See Fig. 14, 15, 22a, 22b, A
EAR Repetitive Avalanche Energy Ci) mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
Ralc Junction-to-Case (DCO - 0.40 o C /W
Rm Junction-to-Ambient (PCB Mount) © - 40
1
07/07/11

lRFS/SL4010PbF
International
TOR Rectifier
Static © T J = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
V(BR,DSS Drain-to-Source Breakdown Voltage 100 - - V Vas = 0V, ID = 250pA
AV(BR)Dss/ATJ Breakdown Voltage Temp. Coefficient - 0.10 - V/°C Reference to 25°C, ID = 5mAC)
Rosmn) Static Drain-to-Source On-Resistance - 3.9 4.7 mg Vss = 10V, ID = 106A GD
Vesnh) Gate Threshold Voltage 2.0 - 4.0 V VDs = Vas, ID = 250pA
loss Drain-to-Source Leakage Current - - 2O Vos = 100V, Vas = 0V
- - 250 PA vDS = 100v, Vss = ov, TJ = 125°C
less Gate-to-Source Forward Leakage - - 100 I/ss = 20V
Gate-to-Source Reverse Leakage - - -100 nA Vas = -20V
Rem) Internal Gate Resistance -- 2.0 - Q
Dynamic © T J = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 189 - - S Vos = 25V, ID = 106A
Q, Total Gate Charge - 143 215 ID = 106A
As Gate-to-Source Charge - 38 - Vos = 50V
di Gate-to-Drain ("Miller") Charge - 50 - nC Ves = 10V ©
stnc Total Gate Charge Sync. (Qg - di) - 93 - ID = 106A, VDS =0V, I/ss = 10V
tion) Turn-On Delay Time - 21 - VDD = 65V
t, Rise Time - 86 - ID = 106A
tam, Turn-Off Delay Time - 100 - ns Re = 2.79
t, Fall Time - 77 - Vas = 10V ©
Ciss Input Capacitance - 9575 - Vss = 0V
Coss Output Capacitance - 660 - Vos = 50V
Crss Reverse Transfer Capacitance - 270 - pF f = 1.0MHz See Fig.5
Coss eff. (ER) Effective Output Capacitance (Energy Related)] - 757 - Vas = OV, Vos = 0V to 80V ©See Fig.11
Coss eff. (TR) Effective Output Capacitance (Time Related)© - 1112 - Vss = 0V, VDS = 0V to 80V G)
Diode Characteristics
Symbol Parameter Min Typ. Max. Units Conditions
ls Continuous Source Current 180 MOSFET symbol D
(Body Diode) - - A showing the
ISM Pulsed Source Current integral reverse G
. - - 720 . . .
(Body Diode) OD p-n junction diode. S
VSD Diode Forward Voltage - - 1.3 V Tu = 25°C, ls = 106A, VGS = 0V GD
trr Reverse Recovery Time - 72 - Ts, = 25°C VR = 85V,
- 81 - ns TJ = 125°C IF = 106A
Q,, Reverse Recovery Charge - 210 - TJ = 25°C di/dt = 100A/ps GD
- 268 - nC TJ = 125°C
IRRM Reverse Recovery Current - 5.3 - A T_, = 25°C
to" Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
C) Repetitive rating; pulse width limited by max. junction s Cass eff. (TR) is a fixed capacitance that gives the same charging time
temperature.
as Coss while Vos is rising from 0 to 80% l/DSS.
© COSS eff. (ER) is a fixed capacitance that gives the same energy as
Coss while Vos is rising from 0 to 80% Voss.
®When mounted on 1" square PCB (FR-4 or G-1O Material). For recom
mended footprint and soldering echniques refer to application note #AN-994.
Ro is measured at Tu approximately 90''C
© Ram value shown is at time zero
C) Limited by TJmax, starting TJ = 25°C, L = 0.057mH
Rs = 259, IAS; = 106A, Vai; =10V. Part not recommended for use
above this value .
© ISDS 106A,di/dts1319A/ps,VDD I V(BR)DSS: T, I 175°C.
q) Pulse width f 400ps; duty cycle f 2%.
2

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