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IP2002TRPBF
Synchronous Buck Multiphase Optimized BGA Power Block.
International PD-97096
TOR Rectifier iP2002PbF
tPa/Wi"' Synchronous Buck
mnnmom Multiphase Optimized BGA Power Block
Features: Integrated Power Semiconductors, Drivers & Passives
q Output current 30A continuous with no derating up to
TPCB = 90°C and TCASE = 90°C
I Operating frequency up to 1MHz
. Dual sided heatsink capable
. Very small 11mm x 11mm x 2.6mm profile
I iP2001PbFfootprintcompatible
. Internal features minimize layout sensitivity *
. Optimized for very low power losses iP2002PbF Power Block
Description
The iP2002PbF is a fully optimized solution for high current synchronous buck multiphase applications.
Board space and design time are greatly reduced because most of the components required for each
phase ofa typical discrete-based multiphase circuitare integrated into a single11mmx11mmx2.6mm BGA
power block. The only additional components required for a complete multiphase converter are a PWM IC, the
external inductors, and the input and output capacitors.
iPOWIR technology offers designers an innovative board space saving solution for applications
requiring high power densities. iPOWIR technology eases design for applications where component
integration offers benefits in performance and functionality. iPOWIR technology solutions are also optimized
internally for layout, heat transfer and component selection.
iP2002PbF Internal Block Diagram
PRDY o-,'-
ENABLE o-i- MOSFET
I Driver with
PWM ( Y-'.- .
I dead tune
VDD CIT control
SGND o-i-T ,1, b
* All of the difficult PCB layout and bypassing issues have been addressed with the internal design of the iPOWIR Block. There are no
concerns about double pulsing, unwanted shutdown, or other malfunctions which often occur in switching power supplies. The iPOWIR
Block will function normally without any additional input power supply bypass capacitors. However, for reliable long term operation it is
recommended that at least four 10uF ceramic input decoupling capacitors are provided to the VIN pin of each power block, No additional
5/16/06 1
International
i P2002 P b F All specifications (ii) 25°C (unless otherwise specified) TOR Redlfler
Absolute Maximum Ratings :
Parameter Min Typ Max Units Conditions
VIN to PGND - - 16 V
VDD to SGND - - 6.0 V
PWM to SGND -0.3 - VDD+0.3 V nottoexceedS0V
Enable to SGND -0.3 - VDD+O'3 V nottoexCeed6.0V
Output RMS Current - - 30 A
Block Temperature -40 - 125 °C
Recommended Operating Conditions :
Parameter Symbol Min Typ Max Units Conditions
Supply Voltage Va, 4.6 5.0 5.5 V
Input Voltage Range VIN 3.0 - 13.2 V see Figs.2&3
Output Voltage Range VOUT 0.8 - 3.3 V see Figs.2,4&8
Output Current Range |OUT - - 30 A see Fig.2
Operating Frequency fsw 150 - 1000 kHz seeFigs.2&5
Operating Duty Cycle D - - 85 %
Electrical Specifications @ VDD = 5V (unless otherwise specified) :
Parameter Symbol Min Typ Max Units Conditions
Block Power Loss co PBLK - 7.2 8.9 W vm=12v,vom=1.3v,
Turn On Delay © tum”) - 63 - ns Iour=30A,fsvv=1MHz
Turn Off Delay © tam - 26 -
VIN Quiescent Current IQ_VIN - - 1.0 mA Enable=0V, vm=12v
Va, Quiescent Current IQ_VDD - - 10 HA Enable=0VVa,=5V
Under-Voltage Lockout UVLO
Start Threshold VSTART 4.2 4.4 4.5 V
Hysteresis VHVS_UVLO - .05 -
Enable Enable
Input Voltage High VIH 2.0 - - V
Input Voltage Low VIL - - 0.8
Power Ready PRDY
Logic Level High VOH 4.5 4.6 - V vDD=4.ev, ILDad=10mA
Logic Level Low VOL - 0.1 0.2 1/ptNLOThresruold, |Load=1mA
PWM Input PWM
Logic Level High VOH 2.0 - - V
Logic Level Low VOL - - 0.8
co Measurement were made using four 10uF (TDK C3225X7R1C106M or equiv.) capacitors across the input (see
© :Et esociated with the rise and fall times. Does not affect Power Loss (see Fig. 9).
2
