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IP1201-IP1201TR
Dual Output Full Function 2 Phase Synchronous Power Block, Integrated Power Semiconductors, PWM Controller and Passives.
. PD-94590
International
TOR Rectifier iP1201
tpa/Wi"' Dual Output Full Function 2 Phase
Synchronous Buck Power Block
Features TECHNOLOGY Integrated Power Semiconductors,
q 3.14V to 5.5V input voltage PWM Control & Passives
q 0.8V to 3.3V output voltage
2 Phase Synchronous Buck Power Block
. 180° out of phase operation
. Single or Dual output capability
. Dual 15A maximum load capability
. Single 2 phase 30A maximum load capability
. 200-400kHz per channel nominal switching frequency
- Over Current Hiccup or Over Current Latch
q External Synchronization capability
. Overvoltage protection
. Independent soft start per output
. Over Temperature protection
. Internal features minimize layout sensitivity * .
. Very small outline 15.5mm x 9.25mm x 2.6mm iP1201 Power Block
Description
The iP1201 is a fully optimized solution for medium current synchronous buck applications requiring up to 15A
or 30A. The iP1201 is optimized for 2 phase single output applications up to 30A or dual output, each up to
15A with interleaved input. It includes full function PWM control, with optimized power semiconductor chip-sets
and associated passives, achieving high power density. Very few external components are required to create
a complete synchronous buck power supply.
iPOWlR technology offers designers an innovative space-saving solution for applications requiring high power
densities. iPOWlR technology eases design for applications where component integration offers benefits in
performance and functionality. iPOWlR technology solutions are also optimized internally for layout, heat
transfer and component selection.
iP1201 Configurations
' Channel 1
' Channel 2
Single Output Dual Output
* Although, all of the difficult PCB layout and bypassing issues have been addressed with the internal design of the iPOWIR block, proper layout techniques should be applied
for the design of the power supply board. There are no concerns about unwanted shutdowns common to switching power supplies, if operated as specified. The iPOWIR block
will function normally, but not optimally without any additional input decoupling capacitors. Input decoupling capacitors should be added at Vin pin for stable and reliable long
term operation. See layout guidelines in datasheet for more detailed information.
10/6/03 1
iP1201
All specifications @ 25°C (unless otherwise specified)
International
TOR Rectifier
Absolute Maximum Ratings
Parameter Sym bol Min Typ Max Units Conditions
VIN VIN -O.3 - 5.8
Feedback VFB1/VFB2 -0.3 - 6
Output Overvoltage Sense VFB1s/VFB2s -0.3 - 6
PGOOD -O.3 - 6
ENABLE -O.3 - 5.8 V
Soft Start SS1/SS2 -0.3 - 6
Vp-ref -0.3 - 6
HICCUP HICCUP -0.3 - 6
SYNC -0.3 - 6
Output RMS Current Per Channel loutvsw - - 15 A 2 Independent outputs. See Fig. 3
o Capable of start up over full
Block Temperature TBLK -40 - 125 C temperature ranqe. See Note 1.
Recommended Operating Conditions
Parameter Sym bol Min Typ Max Units Conditions
Input Voltage Range VIN 3.14 - 5.5
2 Independent outputs
- - 15 A TPCB = TCASE = 90°C. See Fig. 3
Output RMS Current Per Channel loutvsw 2 Independent outputs
- - 11.5 A Tracie = 90°C, TCASE = no airflow, no
heatsink. See Fig. 3
0.8 - 3.3 For v.N=5v
Output Voltage Range Vow 0.8 - 2.5 V For NG-- 3.3V
Electrical Specifications @ VIN = 5V
Parameter Symbol Min Typ Max Units Conditions
Power Loss PLOSS - 6.7 8.4 W fsw=f°OkHL V'" = 5V, V0“: ISV,
IOUT - 15A
" = 5v, Vour = 1.5V,
Over Current Shutdown loc - 20 - A fsw= 300KHz, HICCUP pin pulled
HICCUP pin pulled high, output
HICCUP duty cycle DHICCUP - 5 - % \s/hort cgcwted. 1 V
= 5 , = .5 ,
Soft Start Time tss - 5 - ms of 1= cg 70:1)th
Reference Voltage VREF - 0.80 - V low = 2A
VOUT ACC1 -3 - 3 TBLK = -40oC to 125°C, See Note 1.
VOUT Accuracy V - 2 5 2 % 1:rf/yitth=21scsl( See Note 1.
OUT_ACC2 - . - .5 vlN = 5V v0UT = 1.5V
Error Am ifIer 1 & 2 in ut offset
voltage p p Vom, V032 M - 4 mV VIN = 5V, VOUT = ISV
FB1 /FB2 Input bias current lm, la - -0.1 - ysA
Error Amplifier
source/sink Current IERR - 60 - ”A
Error Amplifier
Transconductance 9m1, 9m2 - 2000 - pmho
Output Overvoltage Shutdown See OVP note in Design Guidelines
Threshold OVP - 1.15 x VOUT - V
OVP Fault Propagation Delay love - 25 - us Outputforced to 1.125Vref
PGOOD Trip Threshold VTh_pGOOD - 0.85 x Vom - V FB1 or FB2 ramping down
PGOOD Output Low Voltage VLo_PGOOD - 0.25 - V ISINK= 2mA
