HYB514100BJ-60 ,4M x 1 Bit FPM DRAM 5 V 60 ns4M · 1-Bit Dynamic RAM HYB 514100BJ-50/-60Advanced Information• 4 194 304 words by 1-bit organizati ..
HYB514171BJ-60 ,256k x 16-Bit Dynamic RAM256k · 16-Bit Dynamic RAM HYB 514171BJ-50/-60Advanced Information• 262 144 words by 16-bit organiza ..
HYB514175BJ-50 ,-256k x 16-Bit EDO-DRAM256k · 16-Bit EDO-DRAM HYB 514175BJ-50/-55/-60Advanced Information• 262 144 words by 16-bit organiz ..
HYB514175BJ-55 ,256k x 16-Bit EDO-DRAM256k · 16-Bit EDO-DRAM HYB 514175BJ-50/-55/-60Advanced Information• 262 144 words by 16-bit organiz ..
HYB514175BJ-60 ,256k x 16 Bit EDO DRAM 5 V 60 ns256k · 16-Bit EDO-DRAM HYB 514175BJ-50/-55/-60Advanced Information• 262 144 words by 16-bit organiz ..
HYB514256BJ-60 , 256 K x 4-Bit Dynamic RAM Low Power 256 K x 4-Bit Dynamic RAM
ICS9UMS9610CKLFT , PC MAIN CLOCK
ICSLV810FILFT , Buffer/Clock Driver
ICT49FCT3805ASO , 3.3V CMOS BUFFER/CLOCK DRIVER
ICTE-18 ,Diode TVS Single Uni-Dir 18V 1.5KW 2-Pin Case 41A-04 Boxapplications0.210 (5.3) • High temperature soldering guaranteed:O0.190 (4.8) 265 C/10 seconds, 0.37 ..
ICTE-5 ,Diode TVS Single Uni-Dir 5V 1.5KW 2-Pin Case 41A-04 Box Document Number 883562 23-May-03ICTE5.0 thru ICTE18C, 1N6373 thru 1N6378 & 1N6382 thru 1N6386Visha ..
ICTE-5 ,Diode TVS Single Uni-Dir 5V 1.5KW 2-Pin Case 41A-04 BoxThermal Characteristics (T = 25°C unless otherwise noted)AParameter Symbol Limit UnitPeak pulse pow ..
HYB514100BJ-60
4M x 1 Bit FPM DRAM 5 V 60 ns
SDEMENS
4M M 1-Bit Dynamic RAM HYB 5141 OOBJ-50l-60
Advanced Information
. 4 194 304 words by 1-bit organization
q O to 70 °C operating temperature
. Fast Page Mode Operation
. Performance:
-50 -60
tRAC R/VS access time 50 60 ns
tCAC CVS access time 13 15 ns
1AA Access time from address 25 30 ns
tRC ReadNVrite cycle time 95 110 ns
tPC Fast page mode cycle time 35 40 ns
. Single + 5 V (k 10 %) supply with a built-in Fa, generator
. Low power dissipation
max. 660 mW active (-50 version)
max. 605 mW active (-60 version)
. Standby power dissipation:
11 mW max. standby (TTL)
5.5 mW max. standby (CMOS)
. Output unlatched at cycle end allows two-dimensional chip selection
q Read, write, read-modify write, CAS-before-RAS refresh, RAS-only refresh,
hidden refresh and test mode capability
. All inputs and outputs TTL-compatible
. 1024 refresh cycles/16 ms
. Plastic Packages: P-SOJ-26/20-2 with 300 mil width
Semiconductor Group 1 1998-10-01
Sill EMENS HYB 5141OOBJ-50l-60
4M xl DRAM
The HYB 5141OOBJ is the new generation dynamic RAM organized as 4 194 304 words by I-bit.
The HYB 5141OOBJ utilizes CMOS silicon gate process as well as advances circuit techniques to
provide wide operation margins, both internally and for the system user. Multiplexed address inputs
permit the HYB 5141OOBJ to be packed in a standard plastic P-SOJ-26/20 package. This package
size provides high system bit densities and is compatible with commonly used automatic testing and
insertion equipment. System oriented features include single + 5 V (i 10 %) power supply, direct
interfacing with high performance logic device families such as Schottky TTL.
Type Ordering Code Package Descriptions
HYB 514100BJ-50 067100-Q971 P-SOJ-26/20-2 300 mil DRAM (access time 50 ns)
HYB 514100BJ-60 Q67100-Q759 P-SOJ-26/20-2 300 mil DRAM (access time 60 ns)
P-SOJ-26l20-2
DI C IC) 26 Cl Vss
v7E E 2 25 1 DO
FWS E 3 24 Ll m
NC. E 4 23 Ll N.C.
A10 E 5 22 1 A9
A0 E 9 18 1 A8
AIC 10 17 Ll A7
A2 E 11 16 Ll A6
A3 E 12 15 Cl M
VCCE 13 14 1 A4
SPP02808
Pin Configuration
Pin Names
A0 - A10 Address Input
Rg-is Row Address Strobe
cis Column Address Strobe
W ReadNVrite Input
DI Data In
DO Data Out
VCC Power Supply (+ 5 V)
V33 Ground (0 V)
N.C. No Connection
Semiconductor Group 2 1998-10-01
