IC Phoenix
 
Home ›  HH18 > HEF4094BP-HEF4094BT,8-stage shift-and-store register
HEF4094BP-HEF4094BT Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
HEF4094BPNXPN/a50avai8-stage shift-and-store register
HEF4094BTN/a2500avai8-stage shift-and-store register


HEF4094BT ,8-stage shift-and-store registerLogic diagramHEF4094B All information provided in this document is subject to legal disclaimers. N ..
HEF4104BD ,Quadruple low to high voltage translator with 3-state outputs
HEF4104BP ,Quadruple low to high voltage translator with 3-state outputs
HEF4104BP ,Quadruple low to high voltage translator with 3-state outputs
HEF4104BT ,Quadruple low to high voltage translator with 3-state outputs
HEF4104BT ,Quadruple low to high voltage translator with 3-state outputs
HM6264ALFP-10 , 8192-word x 8-bit High Speed CMOS Static RAM
HM6264ALP-10L , 8192-word x 8-bit High Speed CMOS Static RAM
HM6264ALP-12L , 8192-word x 8-bit High Speed CMOS Static RAM
HM6264ALP-15L , 8192-word x 8-bit High Speed CMOS Static RAM
HM6264AP-12 , 8192-word x 8-bit High Speed CMOS Static RAM
HM6264AP-12 , 8192-word x 8-bit High Speed CMOS Static RAM


HEF4094BP-HEF4094BT
8-stage shift-and-store register
1. General description
The HEF4094B is an 8-stage serial shift register. It has a storage latch associated with
each stage for strobing data from the serial input to parallel buffered 3-state outputs
QP0to QP7. The parallel outputs may be connected directly to common bus lines. Data is
shifted on positive-going clock transitions. The data in each shift register stage is
transferred to the storage register when the strobe (STR) input is HIGH. Data in the
storage register appears at the outputs whenever the output enable (OE) signal is HIGH.
Two serial outputs (QS1 and QS2) are available for cascading a number of HEF4094B
devices. Serial data is available at QS1 on positive-going clock edges to allow high-speed
operation in cascaded systems with a fast clock rise time. The same serial data is
available at QS2 on the next negative going clock edge. This is used for cascading
HEF4094B devices when the clock has a slow rise time.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +85 C and 40 C to +125 C Complies with JEDEC standard JESD 13-B
3. Ordering information

HEF4094B
8-stage shift-and-store register
Rev. 11 — 29 August 2013 Product data sheet
Table 1. Ordering information

All types operate from 40 C to +125 C.
HEF4094BP DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
HEF4094BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
HEF4094BTS SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1
HEF4094BTT TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
NXP Semiconductors HEF4094B
8-stage shift-and-store register
4. Functional diagram

NXP Semiconductors HEF4094B
8-stage shift-and-store register
5. Pinning information
5.1 Pinning

5.2 Pin description

Table 2. Pin description

STR 1 strobe input 2 data input 3 clock input
QP0 to QP7 4, 5, 6, 7, 14, 13, 12, 11 parallel output
VSS 8 ground supply voltage
QS1 9 serial output
QS2 10 serial output 15 output enable input
VDD 16 supply voltage
NXP Semiconductors HEF4094B
8-stage shift-and-store register
6. Functional description

[1] At the positive clock edge, the information in the 7th register stage is transferred to the 8th register stage and the QSn outputs.
H = HIGH voltage level; L = LOW voltage level; X = don’t care;
 = positive-going transition;  = negative-going transition;
Z = HIGH-impedance OFF-state; NC = no change;
Q6S = the data in register stage 6 before the LOW to HIGH clock transition;
Q7S = the data in register stage 7 before the HIGH to LOW clock transition.
Table 3. Function table[1]
L XXZ Z Q6S NC L XXZ Z NC Q7S HL X NC NC Q6S NC HH L L QPn 1Q6S NC H HHH QPn 1Q6S NC H H H NC NCNCQ7S
NXP Semiconductors HEF4094B
8-stage shift-and-store register
7. Limiting values

[1] For DIP16 packages: above Tamb = 70 C, Ptot derates linearly with 12 mW/K.
[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
For (T)SSOP16 package: Ptot derates linearly with 5.5 mW/K above 60 C.
8. Recommended operating conditions

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS=0 V (ground).
VDD supply voltage 0.5 +18 V
IIK input clamping current VI< 0.5 V or VI >VDD + 0.5 V - 10 mA input voltage 0.5 VDD + 0.5 V
IOK output clamping current VO< 0.5 V or VO >VDD + 0.5 V - 10 mA
II/O input/output current - 10 mA
IDD supply current - 50 mA
Tstg storage temperature 65 +150 C
Tamb ambient temperature 40 +125 C
Ptot total power dissipation DIP16 [1]- 750 mW
SO16, SSOP16 and TSSOP16 [2]- 500 mW power dissipation per output - 100 mW
Table 5. Recommended operating conditions

VDD supply voltage 3 - 15 V input voltage 0 - VDD V
Tamb ambient temperature in free air 40 - +125 C
t/V input transition rise and fall rate VDD = 5 V --3.75 s/V
VDD = 10 V --0.5 s/V
VDD = 15 V --0.08 s/V
NXP Semiconductors HEF4094B
8-stage shift-and-store register
9. Static characteristics
Table 6. Static characteristics
VSS = 0 V; VI =VSS or VDD; unless otherwise specified.
VIH HIGH-level
input voltage IO < 1 A 5 V 3.5 - 3.5 - 3.5 - 3.5 - V
10 V 7.0 -7.0 -7.0 - 7.0 - V
15 V 11.0 - 11.0 - 11.0 - 11.0 - V
VIL LOW-level
input voltage IO < 1 A 5 V - 1.5 - 1.5 - 1.5 - 1.5 V
10 V - 3.0 - 3.0 - 3.0 - 3.0 V
15 V - 4.0 - 4.0 - 4.0 - 4.0 V
VOH HIGH-level
output voltage IO < 1 A 5 V 4.95 - 4.95 - 4.95 - 4.95 - V
10 V 9.95 - 9.95 - 9.95 - 9.95 - V
15 V 14.95 - 14.95 - 14.95 - 14.95 - V
VOL LOW-level
output voltage IO < 1 A 5 V - 0.05 - 0.05 - 0.05 - 0.05 V
10 V - 0.05 - 0.05 - 0.05 - 0.05 V
15 V - 0.05 - 0.05 - 0.05 - 0.05 V
IOH HIGH-level
output current
VO = 2.5V 5 V - 1.7 - 1.4 - 1.1 - 1.1 mA
VO = 4.6V 5 V - 0.64 - 0.5 - 0.36 - 0.36 mA
VO = 9.5V 10 V - 1.6 - 1.3 - 0.9 - 0.9 mA
VO = 13.5V 15 V - 4.2 - 3.4 - 2.4 - 2.4 mA
IOL LOW-level
output current
VO = 0.4V 5 V 0.64 - 0.5 - 0.36 - 0.36 - mA
VO = 0.5V 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA
VO = 1.5V 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA
IOZ OFF-state
output current
QPn output HIGH; =15VV - 0.4 - 0.4 - 12 - 12 A input leakage
currentV - 0.1 - 0.1 - 1.0 - 1.0 A
IDD supply current all valid input
combinations; =0A
5 V - 5 - 5 - 150 - 150 A
10 V - 10 - 10 - 300 - 300 A
15 V - 20 - 20 - 600 - 600 A input
capacitance
--- 7.5 -- - - pF
NXP Semiconductors HEF4094B
8-stage shift-and-store register
10. Dynamic characteristics
Table 7. Dynamic characteristics
VSS = 0 V; Tamb = 25 C; for test circuit see Figure 11; unless otherwise specified.
tPHL HIGH to LOW
propagation delayto QS1;
see Figure7
5 V [1] 108 ns + (0.55 ns/pF)CL - 135 270 ns
10 V 54 ns + (0.23 ns/pF)CL - 65 130 ns
15 V 42 ns + (0.16 ns/pF)CL - 50 100 ns
CP to QS2;
see Figure7
5 V 78 ns + (0.55 ns/pF)CL - 105 210 ns
10 V 39 ns + (0.23 ns/pF)CL - 50 100 ns
15 V 32 ns + (0.16 ns/pF)CL -40 80 ns
CP to QPn;
see Figure7
5 V 138 ns + (0.55 ns/pF)CL - 165 330 ns
10 V 64 ns + (0.23 ns/pF)CL - 75 150 ns
15 V 47 ns + (0.16 ns/pF)CL - 55 110 ns
STR to QPn;
see Figure8
5 V 83 ns + (0.55 ns/pF)CL - 110 220 ns
10 V 39 ns + (0.23 ns/pF)CL - 50 100 ns
15 V 27 ns + (0.16 ns/pF)CL -35 70 ns
tPLH LOW to HIGH
propagation delay, to QS1;
see Figure7
5 V [1] 78 ns + (0.55 ns/pF)CL - 105 210 ns
10 V 39 ns + (0.23 ns/pF)CL - 50 100 ns
15 V 32 ns + (0.16 ns/pF)CL -40 80 ns
CP to QS2;
see Figure7
5 V 78 ns + (0.55 ns/pF)CL - 105 210 ns
10 V 39 ns + (0.23 ns/pF)CL - 50 100 ns
15 V 32 ns + (0.16 ns/pF)CL -40 80 ns
CP to QPn;
see Figure7
5 V 123 ns + (0.55 ns/pF)CL - 150 300 ns
10 V 59 ns + (0.23 ns/pF)CL - 70 140 ns
15 V 47 ns + (0.16 ns/pF)CL - 55 110 ns
STR to QPn;
see Figure8
5 V 73 ns + (0.55 ns/pF)CL - 100 200 ns
10 V 34 ns + (0.23 ns/pF)CL -45 90 ns
15 V 27 ns + (0.16 ns/pF)CL -35 70 ns transition time 5 V [1] 10 ns + (1.00 ns/pF)CL - 60 120 ns
10 V 9 ns + (0.42 ns/pF)CL -30 60 ns
15 V 6 ns + (0.28 ns/pF)CL -20 40 ns
tPZH OFF-state to HIGH
propagation delayto QPn;
see Figure9
5 V - 40 80 ns
10 V - 25 50 ns
15 V - 20 40 ns
tPZL OFF-state to LOW
propagation delayto QPn;
see Figure9
5 V - 40 80 ns
10 V - 25 50 ns
15 V - 20 40 ns
tPHZ HIGH to OFF-state
propagation delayto QPn;
see Figure9
5 V - 75 150 ns
10 V - 40 80 ns
15 V - 30 60 ns
NXP Semiconductors HEF4094B
8-stage shift-and-store register

[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
tPLZ LOW to OFF-state
propagation delayto QPn;
see Figure9
5 V - 80 160 ns
10 V - 40 80 ns
15 V - 30 60 ns
tsu set-up time D to CP;
see Figure10
5 V 6030- ns
10 V 20 10 - ns
15 V 15 5 - ns hold time D to CP;
see Figure10
5 V +5 15 - ns
10 V 20 5 - ns
15 V 20 5 - ns pulse width minimum LOW
clock pulse;
see Figure7
5 V 6030- ns
10 V 30 15 - ns
15 V 24 12 - ns
minimum HIGH
strobe pulse;
see Figure8
5 V 4020- ns
10 V 30 15 - ns
15 V 24 12 - ns
fmax maximum frequency see Figure7 5 V 5 10 - MHz
10 V 11 22 - MHz
15 V 1428- MHz
Table 7. Dynamic characteristics …continued

VSS = 0 V; Tamb = 25 C; for test circuit see Figure 11; unless otherwise specified.
Table 8. Dynamic power dissipation

VSS = 0 V; tr = tf  20 ns; Tamb = 25 C. dynamic power
dissipation
5 V PD = 2100  fi + (fo  CL)  VDD2 fi = input frequency in MHz,
fo = output frequency in MHz,
CL = output load capacitance in pF,
VDD = supply voltage in V,
(fo  CL) = sum of the outputs.V PD = 9700  fi + (fo  CL)  VDD2V PD = 26000  fi + (fo  CL)  VDD2
NXP Semiconductors HEF4094B
8-stage shift-and-store register
11. Waveforms

Table 9. Measurement points
V to 15V 0.5VDD 0.5VDD 0.1VDD 0.9VDD
NXP Semiconductors HEF4094B
8-stage shift-and-store register

ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED