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HDS-1250ATM |HDS1250ATMADN/a4avai12-Bit Video Speed Hybrid Current Out D/A Converter


HDS-1250ATM ,12-Bit Video Speed Hybrid Current Out D/A Converterspecifications that apply to all devices include TTL logic; glass or hermetic metal package; umpul ..
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HDS-1250ATM
12-Bit Video Speed Hybrid Current Out D/A Converter
ANALOG
I EVICES
8-,10-,12-Bitvideo Speed Hybrid
Current g Voltage Out D/A Converter
ciriGi,c
FEATURES
0 25ns Current Settling to 0.1% (HDS)
0 200ns Voltage Settling to 0.1% (HDH)
I 10mA Current Out (HDS)
. Guaranteed Monotonicity
Over Temperature
. No External Parts Required
. Reliable Hybrid Construction
APPLICATIONS
CRT Vector Displays
TV Video Reconstruction
Military Equipment (MlL-STD-883)
Analytical and Medical Instruments
GENERAL Dr'.SC.'ltIrrl1ON
The HDS/IIDH series of digital to analog converters represent
the fastest precision settling current and voltage DAC's avail-
able. Capable ofprocessing to MIL-STD-883 and guaranteed
monotonicity over their operating temperature range; their
quiescent power is 1/2 that of competitive units. The current
output models provide lOmA full scale allowing direct drive
of capacitive loads and transmission lines. All versions have a
precision reference and arc active laser trimmed to specified
accuracy, thus no external adjustment pots or other compo-
nents are required.
With 6 available units engineering trade-offs can be made be-
tween resolution, speed, current or voltage output, and of
course price. To facilitate this comparison major specifications
are summarized in Table I.
Full Scale Step
Model Resolution Settling Time
Current Output 10mA Step
HDS-0820 8 Bits 20ns to 0.4%
IIDS-1025 10 Bits 25ns to 0.1%
HDS-l 250 12 Bits 35ns to 0.025%
Voltage Output 10V Step
HDH-0802 8 Bits 200ns to 0.4%
HDH-1003 10 Bits 300ns to 0.1%
HDH-1205 12 Bits 500ns to 0.125%
Table I.
Information furnished by Analog Devices IS believed to he accurate
and reliable However, no respo1sibihty IS assumed by Analog Devums
for its use: nor for any mfrmgements of patents or other r ghts of third
parties which may 'esult from Its use No license IS wanted my Impllca
non or otherwnse under any patent or patent rights of Analng Dewees.
Other general specifications that apply to all devices include
T'I'L logic; glass or hermetic metal package; unipolar or bi-
polar operation with internal offsetting reference.
The HDH voltage on tput devices provide access to the op amp
summing point so that reduced full scale output voltage swing
can be provided. Such operation with an external resistor
shunting the internal 1k resistor will reduce the already low
op amp offset drift.
Route 1 Industrial Park; P.O. Box 280; Norwood, Mass. 02062
Tel: 617/329-4700 TWX: 710/394-6577
West Coast Mid-West Texas
714/842-1717 312/894-3300 214/23r5094
s PEO I F I CATIDN S (typical tii) +25°C with nominal power supply voltages unless otherwise noted)
CURRENT OUT VOLTAGE OUT
MODEL UNITS 11DS-0820 11DS-1025 11DS-1250 HDH-0802 11011-1003 HDH-1205
RESOLUTION FS = Full Scale Bits 8 10 12 8 10 12
LSB WEIGHT 4OPA 10PA 2.5PA 40mV lOmV 2.5mV
ACCURACY (Relative to FS Including Linearity) 3% FS 0.1 0.05 0.0125 0.1 0.05 0.0125
Linearity +-10PA 15PA *1.25PA 110mV MmV 11.25mV
LSB 11/4 11/2 11/2 t1/4 t1/2 11/2
Monutonicity Guaranteed Over Operating Temperature Range
ZerdOffset (initial) 15nA max * . lOmV typ . .
50mV max
TEMPERATURE COEFFICIENTS
Linearity ppm/or: 3 . . . . .
Gain ppm/OC 30 . * . . .
Unipolar Offset ppm/DC 3 * . . . '
Bipolar Offset ppm/°C 15 . . ' . .
DATA INPUTS
Logic Compatibility TTL and 5V CMOS
Logic Voltage Lcvcls Positive Logic “1" V +2 to +7 . * . . .
"o'' V 0 to +0.8 . . . . .
Logic Loading (Each Bit) "I " PA 40 . . * . .
"o'' mA -2.6 s t t t .
Codes BIN, OBN BIN,OBN
OUTPUT
Current Range FS
Unipolar mA +1024 ' +10.24 t25 max .. ..
t0.05%
Bipolar mA 15.12 . 15.12 -+25 max .. ..
20.025%
Voltage Out FSl _ 2
Unipolar HDS with 20012 V +1.024 * H.024 -10.24 t0.1% .. ..
Internal Connected Ri. 10.05%
Bipolar V $0.512 . i0.512 $5.12 10.05% .. ..
Compliance V +1.5, -2 . * N/A .. ..
Impedance, Internal (See Figure l) n 200 . . 0.1 max .. ..
SETTLING TIME
Current ns to % le; 20 to 0.4 25 to 0.1 35 to 0.025 N/A N/A N/A
Voltage2
Unipolar or Bipolar Out, 75il Load,
0.56V p-p ns to % FS 30 to 0.4 35 to 0.1 50 to 0.025 N/A N/A N/A
Unipolar or Bipolar Out, Internal
2009 Load, 1.024V PT ns to % FS 45 to 0.4 50 to on 60 to 0.025 N/A N/A N/A
10V Output Step us to % FS N/A N/A N/A 200 to 0.4 300 to 0.1 500 to 0.025
5V Output Step ns to % FS N/A N/A N/A 150to 0.4 200 to 0.1 350 to 0.025
POWER REQUIREMENTS
+14.5Vto r15.5V mA max 42 . 50 70 n’ **
-12Vto -16V mA max 14 . 15 40 .. ..
Power Supply Rejection Ratio %/V 0.2 . . . ' .
TEMPERATURE RANGE
Opcrating, - Glass Package 'c 0 to +70 . . * . .
Operating - "M'' Metal Cases ''c -55 to +125 . ' . . '
Storage ''c -55 to +125 . . . . .
PRICF'.
(1-9) $ 109 119 149 185 195 205
NOTES: 'Contact factory or local Analog Devices sales office for "M''
l Other voltages may be obtained with external resistor.
2 For HDS series, VOUT = IOUT X “equivalcnt which is the value of the
20012 internal impedance in parallel With the external load resistance.
Thus, by correct selection of cxlcmal R1 VOUT can be any magnitude
up to the f or - compliance voltage. See Figures 1 and 2.
Metal Case device specifications and prices.
'Specifications same as HDSOSZO.
"Specifications same as HDH-0802.
Specifications subject to change without notice.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
.._o.soo (20.3) --l
i [5.1)
th020 15.1) - 1
u.2o15.11m~
ii . - i.,30--,
0 .__, . . O
tr- . _ :-t-
-tr- o-,
tr, . _ _ st (3:131
-is. . . . --tv
5 -ty . - '
(27) o- io-
-o. . 1-.. o-
"i .-. 1 " 1
I BOTTOM
VIEW ---1 l...,.--,
DOT ON TOP INDICATES POSITION
OF PIN 1
PINS ARK GOLD PLATED.
GLASS PACKAGE
PIN DESIGNA'rlONS
111)S-0820.11DS-1025
PIN DESIGNATIONS
HDS-l 250
()U'I‘LINE DIMENSIONS
Dimensions shown in inches and (mm).
---0a0tH20.3)
0.0181016)
E0320 (5.1)MlN
BOTTOM
view 0.1 12.5)
DOT om TOP INDICATES POSITION
OF PIN 1
METAL PACKAGE _ M VERSION
PIN DESiGNATloNS'
HDH SERIES
PIN FUNCTION PIN FUNCTION PIN FUNCTION
1 _BlT1 (MSB)
1 +15V 1 BIT 1 (M38) 2 BIT 2 _
2, 3 BIT 1 (MSB) 2 BIT 2 '3, B11: -
4 BIT 2 3 BIT 3 .._.____£- - -
4 BIT 4 5 $1.5 .- _
5 BIT 3 __6W BI_T_6_
5 BIT 5 7 BIT
6 BIT4 6 .BIT6 e sns__ - -
7 BIT 5 7 BIT 7 J, 211510 _ ‘
8 BIT 6 8 BIT 8 11 BIT 11 - -
9 BIT 7 9 BIT 9 -1il, 3'11“
10 BIT 8 10 BIT 10 13-19 GROUND A
20 SUM NODE
11 BIT 9 (HDS-1025) Ill, 'll,' .1; 21 OUTPUT _ V
12 BIT 10 22 BIPOLAR OFFSET - -
13-19 GND 23 -15V
13-20 GND 20 OUTPUT 24 +15V - -
21 OUTPUT 21 Rt, 200n
22 RL 200n 22 BIPOLAR OFFSET 'i1,'"ly"'" DEVICES, GROUND PINS 9,10,11
23 BIPO LAR OFFSET 23 -15V fl! HoH-wos DEVICES, GROUND PINS 11 AND
24 -151/ 24 +15V 1 .
Complement Offset
Analog Output, t5.12mA Offset Binary Analog Output, ce5.12V Binary
+5.11mA(1LSB) 111 ...... 1 -ii.1175V 111 ...... l
+2.56mA 1 10 ...... 0 -2.56V 1 10 ...... 0
0111A 10 0 ...... 0 0V 1 0 0 ...... 0
-2.56mA 010 ...... 0 +2.56V 010 ...... 0
-5.12mA 000 ...... 0 +5.12V 000 ...... 0
Analog Output, 0 to +10.24mA Straight Binary Analog Output, 0 to +10.24V Complement Binary
+10.23mA 111 ...... 1 -10.2375V 111 ...... 1
+7.68mA 1 10 ...... 0 -7.68V 1 10 ...... 0
+5.12mA 100 ...... o -5,12V 100 ...... 0
+2.56mA 010 ...... 0 -2.56V 010 ...... 0
1 0111A O 0 0 ...... 0 0V o O 0 ...... O
Table 2. Coding HDS Series
Table 3. Coding HDH Series
OFFSET
OUTPUT
GROUND
CURRENT CONTROLLED BY
DIGITAL INPUT CODE
Figure 1. HDS Current Equivalent Circuit
OFFSET
OUTPUT
GROUND
L _ - EE_“ZLZE‘L -l
VOLTAGE CONTROLLED BY
DIGITIAL INPUT CODE
Figure 2. HDS Voltage Equivalent Circuit
BIPOLAR OFFSET
DIGITAL D/A OUTPUT
CONVERTER +0 512v FS OR
:5‘12mA FS
GROUND
INPUTS I
-ic, 0.1uF -15V +15V 0.1M: i;
Figure 3. Bipolar Current Output
BIPOLAR OFFSET
GROUND
CONVERTER
DIGITAL
INPUTS
OUTPUT
0V TO +1.024V on
o TO +10.24mA
GROUND
f, 0.1pF .-1 0.1uF t
Figure 4. Unipolar Current Output X
5V +15V
-15N +1bV
MSB HI
VOLTAGE
OUTPUT
IV OUT--
-R1 '10 24m/hf
Hos 050
OF AMP
INPUTS
DIGITAL l A
I Cr---" CONVERTER
LSB GROUND
CIRCUIT PROVIDES UNIPOLAR NEGATIVE OUT
PUT WITH COMPLEMENT BINARY CODING
(BIPOLAR OFFSET GROUNDED) OR BIPOLAR
OUTPUT WITH COMPLEMENTARY OFFSET BINARY
CODING [BIPOLAR OFFSET TO lot
SETTLING TIME FOR 10 MV0uTPUr(R1=1k)
IS APPROXIMATE) 150m,
Figure 5. Inverting Unipolar or Bipolar Voltage Output
ORDERING INFORMATION
Order model number IiDS-0820, HDS-1025, HDS-1250,
HDH-0802, HDH-1003, HDH-1205. Models with extended
operating temperature range, hermetically-sealed metal-case
construction (M versions) and MIL-STD-883 processing are
also available. Consult factory or local Analog Devices sales
office for further information.
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