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HCF4075BM1STN/a127avaiTRIPLE 3-INPUT OR GATE
HCF4075M013TRSTN/a10000avaiTRIPLE 3-INPUT OR GATE


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HD64F3334YFLH16 , Hitachi Single Chip Microcomputer
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HCF4075BM1-HCF4075M013TR
TRIPLE 3-INPUT OR GATE
1/7September 2001 MEDIUM SPEED OPERATION :
tPD = 60ns (TYP.) at VDD = 10V QUIESCENT CURRENT SPECIFIED UP TO
20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT
II = 100nA (MAX) AT VDD = 18V TA = 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC
JESD13B " STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DESCRIPTION

The HCF4075B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP and SOP packages.
The HCF4075B TRIPLE 3 INPUT OR GATE
provides the system designer with direct
implementation of the positive logic OR function
and supplement the existing family of CMOS
gates.
HCF4075B

TRIPLE 3 INPUT OR GATE
PIN CONNECTION
ORDER CODES
HCF4075B
2/7
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE

X : Don’t Care
ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
HCF4075B
3/7
DC SPECIFICATIONS

The Noise Margin for both "1" and "0" level is: 1V min. with VDD=5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V
DYNAMIC ELECTRICAL CHARACTERISTICS (T
amb = 25°C, CL = 50pF, RL = 200KΩ, tr = tf = 20 ns)
(*) Typical temperature coefficient for all VDD value is 0.3 %/°C.
HCF4075B
4/7
TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance)
RL = 200KΩ
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)


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