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HAS-1201KM |HAS1201KMADN/a7avaiANALOG TO DIGITAL CONVERTER


HAS-1201KM ,ANALOG TO DIGITAL CONVERTERapplications assistance, phone Computer Labs Division at (919) 668-951 1 3-574 ANALOG-TO-DIGITAL ..
HAS-1201SMB ,12-bit, 1MHz analog-to-digital converter. For radar systems, medical instrumentation, electro-optics systems, test systems, digital oscilloscopesapplications assistance, phone Computer Labs Division at (919) 668-951 1 3-574 ANALOG-TO-DIGITAL ..
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HAS-1201KM
ANALOG TO DIGITAL CONVERTER
ANALOG
DEVICES
12-Bit, IMHz
hitalog-t0-0igital Converter
IlllS-1201
FEATURES
12-Bit Resolution
1MHz Word Rate
TM and Timing Circuits Included
HAS-120l FUNCTIONAL BLOCK DIAGRAM
ENA BLE
Single Hybrid Package ummun NEG Ce" nov“ H As-1201 Elm)
APPLICATIONS OFFSET CE iT (MSM
Radar Systems umpoum POS 0
Medical Instrumentation 5V m TRACK-ANG- 3.STATE
Electro-Opties Systems HOLD ENCODER REGiSTER
Test Systems
Digital Oscilloscopes
ENCODE
COMMAND t"
REGISTER L
STROBE
GENERAL DESCRIPTION
The HAS-1201 AID Converter combines high resolution and
speed in a single hybrid package. This is a complete 12-bit,
IMH2 unit which includes a track-and-hold and timing circuits.
It's a total solution for the system designer who needs to perform
the entire analog-to-digital conversion function in the smallest
possible space.
This remarkable converter is a full answer to the question of
digitizing analog signals into high-resolution data outputs and
doing it in the most cost-effective way. The HAS-1201 is the
ideal choice for the designer who needs state-of-the-art performance
in high-resolution, high-speed A/D conversion.
TIMING GENERATOR
Full-scale analog inputs are 5 or 10 volts; and the unit can operate
with either bipolar or unipolar ranges. Analog input impedance
is 1,000 ohms or 2,000 ohms and the three-state digital outputs
are TTL compatible. The user needs to supply only an encode
command and external power supplies for operation.
All models of the HAS-1201 A/D Converter are housed in 46-pin
metal hybrid packages. The HAS-1201KM operates over a
temperature range of 0 to + 70°C. The HAS-1201SM is rated
over an operating temperature range of - 25°C to + 85°C, but
will operate with dented performance over a range of - 55°C to
+ 100'C. For units operating from - 25''C to + 85°C and military
screening, order HAS-120iSMB; contact the factory for details
about dented performance and military screening.
ANALOG-TO-DIGITAL CONVERTERS 3-573
s P E t I F I t ATI 0 ll s (typical © + 25% with nominal power supplies unless otherwise noted)
Parameter Units HAS-IZDIKM HAS-lzolSM/SMB
RESOLUTION FS = Full Scale Bits 12 .
( ) MS 0.025 * HAS-1201 PIN DESIGNATION
ACCURACY
Gain % FS 2 3 . PIN FU NCTION PIN FUNCTION
Gain w. Temperature ppmPC 80 * " + SV , + W
Linearity © dc . % FS t 1/2LSB 0.0125 ' .5 - ISV 2 GROUND
Diff. Non.ii.nearity VS- Temp. pmeC I0 15 44 unwoun POSITIVE , ENCODECOMMAND
Monotonicity Guaranteed * 43 UNIPOLARNEGATIVE q GROUND
DYNAMICCHARACTERISTICS " -51v 5 GROUND
In-Band "modal 41 GROUND 6 DO NOT CONNECT'
(dc to lOOkHz) dB below FS (min) 80 (75) * 40 5V RANGE IN 7 GROUND
(lOOkHz to SOOkHz) dB below FS 75 I 39 10V RANGE IN 8 REGISTER STROBE
Conversion Rate MHz, max 1.05 1.00 " OFFSET 9 + W
Conversion Time) as, max 950 * 37 DO NOT CONNECT' 10 ENABLE
Over Temperature ns, max 950 1000 M GROUND " BIT , IMSB)
Aperture Uncertainty (J itter) Ph ms 30 . 35 - 15V 12 git-, (MSB)
Aperture Time (Delay) ns 25 * 34 NO CONNECTION " m
Sigmko Noise Rado(SNR)’ dB (min) 68 (65) . 33 NO connecnon " trtr7
Transient Response' ns (max) 600 (1000) . 32 ' ISV " W
Overvoluge Recovery' us 1000 ' 31 ' 15V " m
Input Bandwidth 30 GROUND " Bnrs"
SmuSignal, - 3cm" MHz 2 t 29 GROUND n W
Large Signal, -3dBr MHz 2 . " GROUND " 5TH
Two-Tone Linearity (@ input frequencies) 27 GROUND " iimi
(75km; 105kHz) dB below FS 80 * " GROUND 21 m
ANALOG INPUT 25 GROUND " W
Voltage Ranges v,” FS s.ono.o . " GROUND " BiT12tum
V,max 115 . NOTE:
PINS 2, 4, 5, J. 20-30. M Ind " NEED TO BE CONNECTED
1eyeP,1,c,ef2/ 10V tttput) Mum) 1000/zoom: 1%) I J,i's'llie/),%flrl'd,'l,lWl%%'shrli'/'/it" As
BitxrlarOffut CoNNEcTEDTOAu0ESlGNATED nus.
Initial (5V Input) mV (max) t 2(t 10) . ‘FOR FACTORY USE ONLY.
vs. Temperature FS ppmPC (max) 50 (200) .
DIGITAL INPUTS
Logic Levels, TTL-Compatible V "o'' = 0 ttt + 0.4 *
V "I''= +2.4to+5 .
Impedance LS TTL Loads 3 . NOTES
Riscand Fall Times ns, max 10 * 'In-Bmd Harmonics "pressedin terms ofspuriousin-Undsignals
Frequency MHz, M 1.05 1.00 generated n 1MHa encode me ll unlog inputs shown in ( ).
Encode Command Width, 'Measured from leading edge ofEncode Command to time associated
Min ns 50 . p,ht yf "lid. . _ . .
. RMSugml Iormsnols: mriowith lOOkHz-mlog Input.
Max ns Encode Period - 350rrs * 'For full.scale mp input, 12-bit accuncy named in specified time.
Register Strobe Width ’Recovers to 'mxifled performance in srxsifted timeafter 2 x FS input
Min ns 50 . 1viTell',eii t40dBbet FS
Max ns Encode Period - 350ns * 7 3 " PT W , . . . .
"tiTiiibne- Wi d th :35) 3:110); mput. (Large-signal bandwidth fltt within 0.5dB,
Min ns 100 . '4""vr 'fe,'tl1T, 7t ml
' . ram . . " ''todi ' "l" initUtesencodin .
DIGITAL OUTPUTS . "Output am am ffJ2,'i2ifti,"ll2 analog input is whim tcifted
Format Ili-tl., nose. Negative over-voltage inputs cause Iri-sme output to drift
Bit 1 - Bit 12 3-State; NRZ * to “high" condition Ind my crate erroneous output (scam).
Logic Levels, rruCsrtpatibie"' v "o'' = o to + 0.5 t "Case Tunpenrure. Models HAS-lZOlSM/SMB will operate with
"1"= +2.4to +5 . demtuemsystc.eov..erremp-mtgeoi-s5'cto HOO'C;
. contact tictorymrdrtails.
Drive TTL tands 1 . "Maximum iunction mpenlurc is + ISO‘C.
Time Skew ns, max 10 * "See Section " for package outline information.
Delay: Register Strobe lo Specifications subirct m change without notice.
Output Data Validity ns 30 *
Coding Complementary Binary
(CBIN) .
Complementary Offset
Binary (COB) .
Complementary 2's
Complement (CZSC) .
POWER REQUIREMENTS
+ 15V :5% mh(max) 55 (70) .
- 15V tSVo mA(max) 65 (80) *
+ w t 5% mA (max) I95 (235) .
- 5.2V t 5% mA (max) 35 (40) .
Power Consumption W (max) 3.0 (3.6) *
TEMPERATURE RANGE"
Operating 'C 0 to + 70 - 25 to + 85
Storage 'C - 55 to + 150 .
THERMAL RESISTANCE"
Junction to Air, Bia (Free Air) 'C/W 12 *
Junction tothse, eic "C/W 2.5 '
PACKAGE oprroN"
MA6 HAS-1201KM HAS-l201SM
HAS120tSMB
For applications assistance, phone Computer Labs Division " (919) 668-951 I
3-574 ANALOG-TO-DIGITAL CONVERTERS
Theory of Operation - HAS-1201
THEORY OF OPERATION
Refer to the block diagram of the HAS-1201 AID Converter.
This is a functional illustration of the HAS-1201 AID Converter.
Internally, the converter uses digitally corrected subranging
(DCS) pioneered by Analog Devices to generate 14 bits of digital
data. The two extra bits are used for digital correction to assure
that the 12 bits of parallel output data are an accurate representation
of the analog input signal present at the time of the encode
command.
The analog signal to be digitized is applied to an internal track-and-
hold (T /H), whose change between the "track" and "hold"
modes is determined by the HAS-1201 internal timing circuits.
Applying an encode command (at Pin 3) triggers these circuits
and causes the required timing signals to be generated.
Timing intervals for the various signals involved in the operation
of the HAS-1201 AID Converter are shown in Figure 1.
Understanding the operation of the HAS-i201 is easiest when
the timing of events is related to the leading edge of the Encode
Command. Minimum width of that signal is 50ns; maximum
width is the period of the encode rate less 350ns. A square wave
is always an acceptable encode signal for the HAS-1201
converter.
For purposes of illustration, spacing between Encode Commands
#1 and #2 in Figure l is approximately equal to a word rate of
500kHz.
When the encode command is applied, the unit switches to the
hold mode for approximately 670 nanoseconds; the length of the
track mode is a function of word rate. When operated at its
maximum frequency, the HAS-1201 will remain in "track" 280
"rfl-s- MIN =50ns; MAX =ENCODE PERIOD - 350ns
nanoseconds, the"interval required for internal processing of
During the first 50 nanoseconds of each hold period, valid data
resulting from the previous encode command continue to be
applied to the output register. But then, internal switching
within the HAS-1201 causes changes to occur until the con-
version cycle initiated by the most recent encode command is
completed.
Referenced to the leading edge of the encode command, minimum
spacing on the Register Strobe is 950ns; maximum spacing is
shown with the Register Strobe in dotted lines.
Output data at Pins 11-23 remain valid until updated by a Register
Strobe. As noted, this validity interval is based on having the
ENABLE connected to either digital "o'' or ground.
In Figure 1, the timing of the signals labeled ENABLE and
OUTPUT DATA are not referenced to the ENCODE COM-
MAND; their timing is related only to each other.
If the ENABLE pulse is used to strobe output data into external
circuits, the user must assure its arrival corresponds to the
availability of valid data. When the ENABLE is at digital "I",
output data present a high impedance to external circuits. Changing
ENABLE to a digital "O" causes the three-state logic outputs to
become low impedances and makes them available for strobing.
In the block diagram, the external connection of the encode
command (Pin 3) to the register strobe (Pin 8) is the connection
which might be used if the HAS-1201 were operating at a con-
tinuous maximum encode rate of 1.05MHz. Under these cir-
cumstances, the output data resulting from Encode Command
#1 will be strobed out of the converter with the leading edge of
Encode Command #2.
ENCODE
COMMAND
67thts
TRACKIHOLD TYPI C A L TRACK
_ MAXIMUM = 950m -e
DATATO LAWN VV o J V H INTERNALDATAVALID AAN Y
/lgl'la WIM )()()()(8 ‘ENCODE COMMAND #" itltt;
---MAxtMUM= usnconE "ms------,
REGISTER - MINIMUM = ssons --I [i
STROBE ' I
OUTPUT DATA VAUD X DATA VALID
DATA' (ENCODE #0) (ENCODE #1)
CHANGING
... ... ... m ... m qqq ... ... ... ...
EtiuiL-E
- MIN. = On:
MAX. - 28ns --l b A I--- MAX. =25nt
gl,Tz" HIGH z=1.5v (i]
'WITH ENABLE QONNECTED TO DIGITAL "O" OR GROUND.
WH PULSED ENABLE,
Figure 1. HAS- 1201 Timing Diagram
ANALOG-TO-DIGITAL CONVERTERS 3-575
OPERATING HNM201 AT WORD RATES LESS The insertion of a delay circuit between the encode command
THAN MAXIMUM input and the strobe input of the HAS-1201 makes it possible to
If encode commands are applied asynchronously, direct connection use each digital output word at a precise time after its asso-
of these pins results in variations in the times when output data dated encode command, even when operating the converter
are available, because of pipeline delay through the converter asynchronously.
and the differences in intervals between encode commands. The delay circuit can take any of several forms. The user may
With Pins 3 and g connected, the leading edge of each encode opt to use a fixed delay line with a delay of 950ns or more; in
command is the signal which strobe: output data generated by other cases, shift registers could be used. Another possibility is
the preceding encode command. There is no separate, designated a variable delay, such as multivibrators, adjusted to the optimum
output signal indicating data are valid. delay for each application.
As an example, assume the HAS-i201 encode rate varies around In this latter approach, the period of the multivibrators can be
SOOkHz, but with relatively large differences in the times between set to any desired time between a minimum of 950ns (the period
encode commands. Under these conditions, the availability of of 1.05MHz) and a maximum determined by the period of the
output data will vary; it is often preferable to have outputs highest word rate to be used.
available a specified interval after each encode command. A
method to achieve this is shown in Figure 2.
-EFiitTie-
FOR UNIPOLAR -tiir,
NEGATIVEINPUT: Y
CONNECT
untpomar 11 annmse)
@w. NEG', HAs-1201 " girf HMSB)
son UNIPOLAR OFFSET I"
POSITIVEINPUT: UNIFOLAR; " BITZ
CONNECT ts
TRACK AND- 3 STATE " BIT3
Caho(ii) HOLD ENCODER REGISTER " B-Ira
l " BITS
" Fans
ENCODE TIMING GENERATOR " rm
COMMAND
20 arts
R f 21 BIT10
DELAY REGISTER -
CIRCUIT -0) smog: 22 BIT"
23 tTirj2tLSB)
4219453545 3132 2451364124>30
' l " /
- 5.2V + 6V - 15V + tSV GROUND
Figure 2. HAS- 1201 Connection Diagram
3-576 ANALOG-TO-DIGITAL CONVERTERS
HAS-l 201
CONNECTING HAS-lZOl AID CONVERTER In Figure 36, the recommended operational amplifier is an
At the analog input, the user connects offset (Pin 38) externally AD741. For 5V Unipolar Negative inputs using this circuit,
to either Pin 43 or Pin 44 to obtain, respectively, unipolar negative connect Pin 43 to the positive input of the op amp and leave
or unipolar positive input ranging. The analog signal to be Pin 44 open.
digitized is applied to Pin 39, the 10V input; or to Pin 40, the
5V input, depending upon the application. Examples are shown
in Figures 3A-SG.
Figure 3A Figure 3B Figure 30
5V FS Bipolar input . . . .
Gainadiustment 15% FS 10V FS Bipolar input yy FS .Ummm Positive mm
. . . Gain adjustment t 10% FS
Offset adjustment t 5% FS Gain adjustment t 5% F3 . o
. . Offset adjustment A 5 A
(Adjust offset first) Offset adjustment t 5% FS (A dius t . E t)
(Adjust offset first) g
Figure 30 Figure 35 Figure 3F
10V FS Unipolar Negative input 5V FS Bipolar input 5V FS Bipolar input
Gain adjustment t 10% FS Gain adjustment , 20% FS No Gain adjustment
Offset adjustment A 5% No Offset adjustment Offset adjustment t 5% FS
(Adjust gain first)
Various input ranges with fired gain and offset are shown in
l Table I.
- 10.24V-4 INPUT RANGE CONNECT PINS INPUT PIN
INPUT 10V Bipolar None 39
"l 10V Uni. Pos. 38:044 39
10V Uni. Neg. 38 to 43 39
5V Bipolar None 40
Figure 36 w Um. Pos. 38 m44 40
5V Uni. Neg. 38 to 43 40
5V Unipolar Positive input 4V Bipolar 38 to 40 40
Offset adjustment fc 5% (800 ohms impedance)
No Gain adjustment
(see text) Tablel.
ANALOG-TO-DIG/TAL CONVERTERS 3-577
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