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FSTUD162450FAIRCHILN/a23avaiConfigurable 4-Bit to 20-Bit Bus Switch with -2V Undershoot Protection and Selectable Level Shifting and 25 Ohm Series Resistors in Outputs


FSTUD162450 ,Configurable 4-Bit to 20-Bit Bus Switch with -2V Undershoot Protection and Selectable Level Shifting and 25 Ohm Series Resistors in OutputsFeaturesThe Fairchild Universal Bus Switch FSTUD162450 pro-

FSTUD162450
Configurable 4-Bit to 20-Bit Bus Switch with -2V Undershoot Protection and Selectable Level Shifting and 25 Ohm Series Resistors in Outputs
FSTUD162450 Configurable 4-Bit to 20-Bit Bus Switch with −2V Undershoot Protection and Selectable Level Shifting and 25Ω Series Resistors in Outputs April 2001 Revised August 2001 FSTUD162450 Configurable 4-Bit to 20-Bit Bus Switch with −2V Undershoot Protection and Selectable Level Shifting and 25Ω Series Resistors in Outputs General Description Features The Fairchild Universal Bus Switch FSTUD162450 pro-Undershoot protected to −2V (A and B Ports) vides 4-bit, 5-bit, 8-bit, 10-bit, 16-bit, 20-bit of high-speedVoltage level shifting CMOS TTL-compatible bus switching. The low On Resis- 25Ω switch connection between two ports tance of the switch allows inputs to be connected to out- Minimal propagation delay through the switch puts without adding propagation delay or generating Low l additional ground bounce noise. CC The FSTUD162450 is designed to allow “customer” config-Zero bounce in flow-through mode uration control of the enable connections. The device can Control inputs compatible with TTL level be organized as either a five 4-bit, four 5-bit, two 10-bit or See Applications Notes AN-5008 and AN-5021 one 20-bit bus switch. Also available are 8-bit and 16-bit for UHC details enabled configurations (see Functional Description). The Also packaged in plastic Fine-Pitch Ball Grid Array device's bit configuration is controlled through select pin (FBGA) (Preliminary) logic. (see Truth Table). When OE is LOW, Port A is con- x x nected to Port B . When OE is HIGH, the switch is OPEN. x x Applications Note The A and B Ports are protected against undershoot to support an extended range to 2.0V below ground. Select pins S , S , S are intended to be used as static 0 1 2 Fairchild's integrated Undershoot Hardened Circuit user configurable control pins. The AC performance of (UHC) senses undershoot at the I/O and responds by these pins has not been characterized or tested. Switching preventing voltage differentials from developing and turn- of these select pins during system operation may tempo- ing the switch on. rarily disrupt output logic states and/or enable pin controls. Another innovative device feature is the addition of a level shifting select pin, “S ”. When S is LOW, the device 2 2 behaves as a standard N-MOS switch. When S is HIGH, a 2 diode to V is integrated into the circuit allowing for level CC shifting between 5V inputs and 3.3V outputs. Ordering Code: Order Number Package Number Package Description FSTUD162450GX BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 1) Preliminary [Tape and Reel] FSTUD162450MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Note 1: BGA package available in Tape and Reel only. UHC is a trademark of . © 2001 DS500469
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