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FQD7N10LFAIRCHILN/a25200avai100V LOGIC N-Channel MOSFET


FQD7N10L ,100V LOGIC N-Channel MOSFETapplications such as highdirect operation from logic drivesefficiency switching DC/DC converters, a ..
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FQD7N10L
100V LOGIC N-Channel MOSFET
FQD7N10L / FQU7N10L December 2000 TM QFET QFET QFET QFET FQD7N10L / FQU7N10L 100V LOGIC N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect  5.8A, 100V, R = 0.35Ω @V = 10 V DS(on) GS transistors are produced using Fairchild’s proprietary,  Low gate charge ( typical 4.6 nC) planar stripe, DMOS technology.  Low Crss ( typical 12 pF) This advanced technology is especially tailored to minimize  Fast switching on-state resistance, provide superior switching  100% avalanche tested performance, and withstand high energy pulse in the  Improved dv/dt capability avalanche and commutation modes. These devices are  Low level gate drive requirments allowing well suited for low voltage applications such as high direct operation from logic drives efficiency switching DC/DC converters, and DC motor control. D D ! ! "" !!"" "" G! ! "" D-PAK I-PAK G S G FQD Series FQU Series D S ! ! S Absolute Maximum Ratings T = 25°C unless otherwise noted C Symbol Parameter FQD7N10L / FQU7N10L Units V Drain-Source Voltage 100 V DSS I - Continuous (T = 25°C) Drain Current 5.8 A D C - Continuous (T = 100°C) 3.67 A C I (Note 1) Drain Current - Pulsed 23.2 A DM V Gate-Source Voltage ± 20 V GSS E (Note 2) Single Pulsed Avalanche Energy 50 mJ AS I Avalanche Current (Note 1) 5.8 A AR E (Note 1) Repetitive Avalanche Energy 2.5 mJ AR dv/dt Peak Diode Recovery dv/dt (Note 3) 6.0 V/ns Power Dissipation (T = 25°C) * 2.5 W P A D Power Dissipation (T = 25°C) 25 W C - Derate above 25°C 0.2 W/°C T , T Operating and Storage Temperature Range -55 to +150 °C J STG Maximum lead temperature for soldering purposes, T 300 °C L 1/8” from case for 5 seconds Thermal Characteristics Symbol Parameter Typ Max Units R Thermal Resistance, Junction-to-Case -- 5.0 °C/W θJC R Thermal Resistance, Junction-to-Ambient * -- 50 °C/W θJA R Thermal Resistance, Junction-to-Ambient -- 110 °C/W θJA * When mounted on the minimum pad size recommended (PCB Mount) ©2000 Fairchild Semiconductor International Rev. A2, December 2000
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