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FQD3N50CFAIRCHILN/a52500avai500V N-Channel MOSFET


FQD3N50C ,500V N-Channel MOSFETFeatures Description• 2.5 A, 500 V, R = 2.5 Ω @ V = 10 V These N-Channel enhancement mode power fie ..
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FQD3N50C
500V N-Channel MOSFET
FQD3N50C/FQU3N50C 500V N-Channel MOSFET ® QFET FQD3N50C/FQU3N50C 500V N-Channel MOSFET Features Description • 2.5 A, 500 V, R = 2.5 Ω @ V = 10 V These N-Channel enhancement mode power field effect transis- DS(on) GS tors are produced using Fairchild’s proprietary, planar stripe, • Low gate charge ( typical 10 nC ) DMOS technology. • Low Crss ( typical 8.5 pF) This advanced technology has been especially tailored to mini- • Fast switching mize on-state resistance, provide superior switching perfor- mance, and withstand high energy pulse in the avalanche and • 100 % avalanche tested commutation mode. These devices are well suited for high effi- • Improved dv/dt capability ciency switched mode power supplies, active power factor cor- rection, electronic lamp ballasts based on half bridge topology. D D {{{{{{{{ ●●●●●●●● ◀◀◀◀◀◀◀◀ ▲▲▲▲▲▲▲▲ ●●●●●●●● G{{{{{{{{ ●●●●●●●● D-PAK I-PAK GS FQD Series FQU Series GS D {{{{ {{{{ S Absolute Maximum Ratings Symbol Parameter FQD3N50C/FQU3N50C Units V Drain-Source Voltage 500 V DSS I Drain Current - Continuous (T = 25°C) 2.5 A D C - Continuous (T = 100°C) 1.5 A C (Note 1) I Drain Current - Pulsed 10 A DM V Gate-Source Voltage ± 30 V GSS (Note 2) E Single Pulsed Avalanche Energy 200 mJ AS (Note 1) I Avalanche Current 2.5 A AR (Note 1) E Repetitive Avalanche Energy 3.5 mJ AR (Note 3) dv/dt Peak Diode Recovery dv/dt 4.5 V/ns P Power Dissipation (T = 25°C) 35 W D C - Derate above 25°C 0.28 W/°C T , T Operating and Storage Temperature Range -55 to +150 °C J STG T Maximum lead temperature for soldering purposes, 300 °C L 1/8" from case for 5 seconds Thermal Characteristics Symbol Parameter Typ Max Units R Thermal Resistance, Junction-to-Case -- 3.5 °C/W θJC R Thermal Resistance, Junction-to-Ambient* -- 50 °C/W θJA R Thermal Resistance, Junction-to-Ambient -- 110 °C/W θJA * When mounted on the minimum pad size recommended (PCB Mount) ©2005 1 FQD3N50C/FQU3N50C Rev. A
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