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FQB13N10LTMFAIRCHILDN/a1192avai100V N-Channel Logic Level QFET


FQB13N10LTM ,100V N-Channel Logic Level QFETapplications such as highefficiency switching DC/DC converters, and DC motorcontrol.D D! !""!!""""G ..
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FQB13N10LTM
100V N-Channel Logic Level QFET
FQB13N10L / FQI13N10L December 2000 TM QFET QFET QFET QFET FQB13N10L / FQI13N10L 100V LOGIC N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect  12.8A, 100V, R = 0.18Ω @V = 10 V DS(on) GS transistors are produced using Fairchild’s proprietary,  Low gate charge ( typical 8.7 nC) planar stripe, DMOS technology.  Low Crss ( typical 20 pF) This advanced technology is especially tailored to minimize  Fast switching on-state resistance, provide superior switching  100% avalanche tested performance, and withstand high energy pulse in the  Improved dv/dt capability avalanche and commutation modes. These devices are  175°C maximum junction temperature rating well suited for low voltage applications such as high efficiency switching DC/DC converters, and DC motor control. D D ! ! "" !!"" "" G! ! "" G S 2 2 D -PAK I -PAK G D S ! ! FQB Series FQI Series S Absolute Maximum Ratings T = 25°C unless otherwise noted C Symbol Parameter FQB13N10L / FQI13N10L Units V Drain-Source Voltage 100 V DSS I - Continuous (T = 25°C) Drain Current 12.8 A D C - Continuous (T = 100°C) 9.05 A C I (Note 1) Drain Current - Pulsed 51.2 A DM V Gate-Source Voltage ± 20 V GSS E (Note 2) Single Pulsed Avalanche Energy 95 mJ AS I Avalanche Current (Note 1) 12.8 A AR E (Note 1) Repetitive Avalanche Energy 6.5 mJ AR dv/dt Peak Diode Recovery dv/dt (Note 3) 6.0 V/ns Power Dissipation (T = 25°C) * 3.75 W P A D Power Dissipation (T = 25°C) 65 W C - Derate above 25°C 0.43 W/°C T , T Operating and Storage Temperature Range -55 to +175 °C J STG Maximum lead temperature for soldering purposes, T 300 °C L 1/8” from case for 5 seconds Thermal Characteristics Symbol Parameter Typ Max Units R Thermal Resistance, Junction-to-Case -- 2.31 °C/W θJC R Thermal Resistance, Junction-to-Ambient * -- 40 °C/W θJA R Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W θJA * When mounted on the minimum pad size recommended (PCB Mount) ©2000 Fairchild Semiconductor International Rev. A4, December 2000
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