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FM27C010VEFAIRN/a828avai1/048/576-Bit 128K x 8 High Performance CMOS EPROM


FM27C010VE ,1/048/576-Bit 128K x 8 High Performance CMOS EPROMFeaturesThe “Don’t Care” feature during read operations allows memoryexpansions from 1M to 8M bits ..
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FM27C040Q120 ,4/194/304-Bit 512K x 8 High Performance CMOS EPROMBlock DiagramData Outputs O - O0 7VCCGNDVPPOutput Enable,OEChip Enable, andOutputCE/PGMProgram Log ..
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FM27C040Q-120 ,4/194/304-Bit 512K x 8 High Performance CMOS EPROMElectrical Characteristics Over operating range with V = VPP CCSymbol Parameter Test Conditions Min ..
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FM27C010VE
1/048/576-Bit 128K x 8 High Performance CMOS EPROM
FM27C010 1,048,576-Bit (128K x 8) High Performance CMOS EPROM . . . . . . . . . January 2000 FM27C010 1,048,576-Bit (128K x 8) High Performance CMOS EPROM The FM27C010 is manufactured using Fairchild’s advanced CMOS General Description AMG™ EPROM technology. The FM27C010 is a high performance, 1,048,576-bit Electrically The FM27C010 is one member of a high density EPROM Family Programmable UV Erasable Read Only Memory. It is organized which range in densities up to 4 Megabit. as 128K-words of 8 bits each. Its pin-compatibility with byte-wide JEDEC EPROMs enables upgrades through 8 Mbit EPROMs. Features The “Don’t Care” feature during read operations allows memory expansions from 1M to 8M bits with no printed circuit board � High performance CMOS changes. —70 ns access time The FM27C010 can directly replace lower density 28-pin EPROMs � Fast turn-off for microprocessor compatibility by adding an A16 address line and V jumper. During the normal CC � Simplified upgrade path read operation PGM and V are in a “Don’t Care” state which PP —V and PGM are “Don’t Care” during normal read PP allows higher order addresses, such as A17, A18, and A19 to be operation connected without affecting the normal read operation. This � Manufacturers identification code allows memory upgrades to 8M bits without hardware changes. � Fast programming The FM27C010 is also offered in a 32-pin plastic DIP with the same upgrade path. � JEDEC standard pin configurations —32-pin PDIP package The FM27C010 provides microprocessor-based systems exten- —32-pin PLCC package sive storage capacity for large portions of operating system and —32-pin CERDIP package application software. Its 70 ns access time provides no-wait-state operation with high-performance CPUs. The FM27C010 offers a single chip solution for the code storage requirements of 100% firmware-based equipment. Frequently-used software routines are quickly executed from EPROM storage, greatly enhancing system utility. Block Diagram Data Outputs O - O 0 7 V CC GND V PP OE Output Enable, CE Chip Enable, and Output Program Logic PGM Buffers Y Decoder 1,048,576-Bit Cell Matrix A - A 0 16 Address Inputs X Decoder DS800032-1 © 2000 1 FM27C010
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