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FIN1532FAIRCHILDN/a899avai5V LVDS 4-Bit High Speed Differential Receiver


FIN1532 ,5V LVDS 4-Bit High Speed Differential ReceiverFeaturesThis quad receiver is designed for high speed intercon-

FIN1532
5V LVDS 4-Bit High Speed Differential Receiver
FIN1532 5V LVDS 4-Bit High Speed Differential Receiver December 2001 Revised December 2001 FIN1532 5V LVDS 4-Bit High Speed Differential Receiver General Description Features This quad receiver is designed for high speed intercon-Greater than 400Mbs data rate nects utilizing Low Voltage Differential Signaling (LVDS)5V power supply operation technology. The receiver translates LVDS levels, with a typ- 0.5 ns maximum differential pulse skew ical differential input threshold of 100 mV, to LVTTL signal 3 ns maximum propagation delay levels. LVDS provides low EMI at ultra low power dissipa- tion even at high frequencies. This device is ideal for highLow power dissipation speed transfer of clock and data.Power-Off protection for inputs and outputs The FIN1532 can be paired with its companion driver, theFail safe protection for open-circuit, shorted and termi- FIN1531, or any other LVDS driver. nated receiver inputs Meets or exceeds the TIA/EIA-644 LVDS standard Pin compatible with equivalent RS-422 and PECL devices 16-Lead SOIC and TSSOP packages save space Ordering Code: Order Number Package Number Package Description FIN1532M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow FIN1532MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pin Descriptions Connection Diagram Pin Name Description R , R , R , R LVTTL Data Outputs OUT1 OUT2 OUT3 OUT4 R , R , R , R Non-inverting LVDS Inputs IN1+ IN2+ IN3+ IN4+ R , R , R , R Inverting LVDS Inputs IN1− IN2− IN3− IN4− EN Driver Enable Pin EN Inverting Driver Enable Pin V Power Supply CC GND Ground Function Table Input Outputs R R R EN EN IN+ IN+ OUT HXH L H Top View HX L H L H X Fail Safe Condition H XL H L H XL L H L X L Fail Safe Condition H LH X Z H = HIGH Logic Level L = LOW Logic Level X = Don’t Care Z = High Impedance Fail Safe = Open, Shorted, Terminated © 2001 DS500504
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