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FDV302PFSCN/a12774avaiDigital FET, P-Channel


FDV302P ,Digital FET, P-ChannelFeatures-25 V, -0.12 A continuous, -0.5 A Peak.This P-Channel logic level enhancement mode field ef ..
FDV303 ,Digital FET/ N-ChannelFeatures25 V, 0.68 A continuous, 2 A Peak.These N-Channel enhancement mode field effect transistors ..
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FDV302P
Digital FET, P-Channel
October 1997 FDV302P Digital FET, P-Channel General Description Features -25 V, -0.12 A continuous, -0.5 A Peak. This P-Channel logic level enhancement mode field effect R = 13 W @ V = -2.7 V transistor is produced using Fairchild's proprietary, high cell DS(ON) GS density, DMOS technology. This very high density process is R = 10 W @ V = -4.5 V. DS(ON) GS especially tailored to minimize on-state resistance. This Very low level gate drive requirements allowing direct device has been designed especially for low voltage operation in 3V circuits. V < 1.5V. applications as a replacement for digital transistors. Since GS(th) bias resistors are not required, this one P-channel FET can Gate-Source Zener for ESD ruggedness. replace several digital transistors with different bias resistors >6kV Human Body Model such as the DTCx and DCDx series. Compact industry standard SOT-23 surface mount package. Replace many PNP digital transistors (DTCx and DCDx) with one DMOS FET. TM TM SuperSOT -8 SOIC-16 SOT-23 SuperSOT -6 SO-8 SOT-223 Mark:302 D G S o Absolute Maximum Ratings T = 25 C unless otherwise noted A Symbol Parameter FDV302P Units V Drain-Source Voltage -25 V DSS V Gate-Source Voltage -8 V GSS I Drain Current - Continuous -0.12 A D - Pulsed -0.5 P Maximum Power Dissipation 0.35 W D T ,T Operating and Storage Temperature Range -55 to 150 °C J STG ESD Electrostatic Discharge Rating MIL-STD-883D 6.0 kV Human Body Model (100pf / 1500 Ohm) THERMAL CHARACTERISTICS R Thermal Resistance, Junction-to-Ambient 357 °C/W JA q © 1997 FDV302P REV. F
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