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FDS6898AZ_F085FAIRCHILN/a5000avai20V Dual N-Channel Logic Level PWM Optimized PowerTrench?MOSFET


FDS6898AZ_F085 ,20V Dual N-Channel Logic Level PWM Optimized PowerTrench?MOSFETapplications where low in-line powerlow RDS(ON)loss and fast switching are required.• High power an ..
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FDS6898AZ_F085
20V Dual N-Channel Logic Level PWM Optimized PowerTrench?MOSFET
® FDS6898AZ_F085 Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET February 2010 tm FDS6898AZ_F085 Ò Ò Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET General Description Features These N-Channel Logic Level MOSFETs are produced · 9.4 A, 20 V R = 14 mW @ V = 4.5 V DS(ON) GS using Fairchild Semiconductor’s advanced R = 18 mW @ V = 2.5 V DS(ON) GS PowerTrench process that has been especially tailored · Low gate charge (16 nC typical) to minimize the on-state resistance and yet maintain superior switching performance. · ESD protection diode (note 3) These devices are well suited for low voltage and · High performance trench technology for extremely battery powered applications where low in-line power low R DS(ON) loss and fast switching are required. · High power and current handling capability · Qualified to AEC Q101 · RoHS Compliant D1 D D1 5 4 D D2 D Q1 D2 D 6 3 7 2 G1 SO-8 G S1 Q2 S G2 S 8 1 S2 SO-8 S Pin 1 o Absolute Maximum Ratings T =25 C unless otherwise noted A Symbol Parameter Ratings Units V Drain-Source Voltage 20 V DSS V Gate-Source Voltage ± 12 V GSS I Drain Current – Continuous (Note 1a) 9.4 A D – Pulsed 38 P W D Power Dissipation for Dual Operation 2 Power Dissipation for Single Operation (Note 1a) 1.6 (Note 1b) 1 (Note 1c) 0.9 T , T Operating and Storage Junction Temperature Range –55 to +150 °C J STG Thermal Characteristics R Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W qJA R Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W qJC Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDS6898AZ FDS6898AZ_F085 13’’ 12mm 2500 units ©2010 1 FDS6898AZ_F085 Rev. A
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