FDMS3660S ,30V Asymmetric Dual N-Channel MOSFET PowerTrench?Power StageElectrical Characteristics T = 25 °C unless otherwise notedJSymbol Parameter Test Conditions Type M ..
FDMS3660S ,30V Asymmetric Dual N-Channel MOSFET PowerTrench?Power StageApplications Low inductance packaging shortens rise/fall times, resulting in lower switching losse ..
FDMS3662 ,100V N-Channel PowerTrench?MOSFETGeneral Description Max r = 14.8m: at V = 10V, I = 8.9A This N-Channel MOSFET is produced usin ..
FDMS3672 ,100V N-Channel UltraFET Trench MOSFETapplications. Max r = 29mΩ at V = 6V, I = 6.6ADS(on) GS DOptimized for r , low ESR, low total and ..
FDMS3672 ,100V N-Channel UltraFET Trench MOSFETGeneral Description Max r = 23mΩ at V = 10V, I = 7.4AUItraFET devices combine characteristics that ..
FDMS3672 ,100V N-Channel UltraFET Trench MOSFETFDMS3672 N-Channel UltraFET Trench MOSFETFebruary 2007FDMS3672 ..
FP75R12KE3 , Elektrische Eigenschaften / Electrical properties
FP75R12KT3 , EconoPIM3 module with fast trench/fieldstop IGBT3 and EmCon High Efficiency diode
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FP75R12KT4_B15 , EconoPIM™3 module with trench/fieldstop IGBT4 and Emitter Controlled 4 diode
FP7G150US60 ,Transfer Molded Type IGBT ModuleFeatures• Short Circuit rated 10us @Tc=100C, Vge=15V• High Speed Switching• Low Saturation Voltage ..
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FDMS3660S
30V Asymmetric Dual N-Channel MOSFET PowerTrench?Power Stage
® FDMS3660S PowerTrench Power Stage December 2012 FDMS3660S ® PowerTrench Power Stage Asymmetric Dual N-Channel MOSFET Features General Description Q1: N-Channel This device includes two specialized N-Channel MOSFETs in a Max r = 8 mΩ at V = 10 V, I = 13 A dual PQFN package. The switch node has been internally DS(on) GS D connected to enable easy placement and routing of synchronous Max r = 11 mΩ at V = 4.5 V, I = 11 A DS(on) GS D buck converters. The control MOSFET (Q1) and synchronous Q2: N-Channel TM SyncFET (Q2) have been designed to provide optimal power Max r = 1.8 mΩ at V = 10 V, I = 30 A DS(on) GS D efficiency. Max r = 2.2 mΩ at V = 4.5 V, I = 27 A DS(on) GS D Applications Low inductance packaging shortens rise/fall times, resulting in lower switching losses Computing MOSFET integration enables optimum layout for lower circuit Communications inductance and reduced switch node ringing General Purpose Point of Load RoHS Compliant Notebook VCORE G1 Pin 1 D1 Pin 1 D1 D1 Q 2 S2 D1 5 4 D1 PHASE PHASE D1 S2 6 3 (S1/D2) S2 D1 7 2 G2 S2 G2 S2 G1 8 1 Q 1 S2 Top Power 56 Bottom MOSFET Maximum Ratings T = 25 °C unless otherwise noted A Symbol Parameter Q1 Q2 Units V Drain to Source Voltage 30 30 V DS V Gate to Source Voltage (Note 3) ±20 ±12 V GS Drain Current -Continuous (Package limited) T = 25 °C 30 60 C -Continuous (Silicon limited) T = 25 °C 60 145 C I A D 1a 1b -Continuous T = 25 °C 13 30 A -Pulsed 40 120 4 5 E Single Pulse Avalanche Energy 33 86 mJ AS 1a 1b Power Dissipation for Single Operation T = 25 °C 2.2 2.5 A P W D 1c 1d Power Dissipation for Single Operation T = 25 °C 1 1 A T , T Operating and Storage Junction Temperature Range -55 to +150 °C J STG Thermal Characteristics 1a 1b R Thermal Resistance, Junction to Ambient 57 50 θJA 1c 1d R Thermal Resistance, Junction to Ambient 125 120 °C/W θJA R Thermal Resistance, Junction to Case 2.9 2.2 θJC Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity 22CF FDMS3660S Power 56 13 ” 12 mm 3000 units 07OD 1 ©2012 FDMS3660S Rev.C3
