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FDD6030LFAIRCHILN/a500avaiN-Channel Logic Level Enhancement Mode Field Effect Transistor


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FDD6030L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FDD6030L August 2000 FDD6030L N-Channel Logic Level Enhancement Mode Field Effect Transistor Features General Description These N-Channel logic level enhancement mode power � 12 A, 30 V. R = 0.0145 W @ V = 10 V DS(ON) GS field effect transistors are produced using Fairchild�s R = 0.0210 W @ V = 4.5 V. DS(ON) GS proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are � Low gate charge. particularly suited for low voltage applications such as DC/DC converters and high efficiency switching circuits � Fast switching speed. where fast switching, low in-line power loss, and resistance to transients are needed. � Low C . RSS Applications � DC/DC converter � Motor drives D D G G S S TO-252 o TC=25 C unless otherwise noted Absolute Maximum Ratings Symbol Parameter Ratings Units V Drain-Source Voltage 30 V DSS V Gate-Source Voltage 20 V GSS – I Maximum Drain Current -Continuous (Note 1) 50 A D (Note 1a) 12 Maximum Drain Current -Pulsed 100 o P Maximum Power Dissipation @ T = 25 C (Note 1) 60 W D C o T = 25 C (Note 1a) 3.2 A o (Note 1b) T = 25 C 1.3 A TJ, Tstg Operating and Storage Junction Temperature Range -55 to +150 C � Thermal Characteristics (Note 1) R Thermal Resistance, Junction-to-Case 2.1 C/W JC � q R Thermal Resistance, Junction-to-Ambient (Note 1a) 39 C/W JA � q 96 C/W � (Note 1b) Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDD6030L FDD6030L 13�� 16mm 2500 ã200 Fairchild Semiconductor International FDD6030L, Rev. C
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