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FDC653NN/a200avaiN-Channel Enhancement Mode Field Effect Transistor


FDC653N ,N-Channel Enhancement Mode Field Effect TransistorNovember 1997 FDC653N N-Channel Enhancement Mode Field Effect Transistor
FDC653N_NL ,N-Channel Enhancement Mode Field Effect TransistorELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)ASymbol Parameter Conditions Min Typ Ma ..
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FDC653N
N-Channel Enhancement Mode Field Effect Transistor
November 1997 FDC653N N-Channel Enhancement Mode Field Effect Transistor General Description Features This N-Channel enhancement mode power field effect 5 A, 30 V.  R = 0.035 W @ V = 10 V DS(ON) GS transistors is produced using Fairchild's proprietary, high cell R = 0.055 W @ V = 4.5 V. DS(ON) GS density, DMOS technology. This very high density process is TM Proprietary SuperSOT -6 package design using copper tailored to minimize on-state resistance. These devices are lead frame for superior thermal and electrical capabilities. particularly suited for low voltage applications in notebook computers, portable phones, PCMICA cards, and other High density cell design for extremely low R . DS(ON) battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount Exceptional on-resistance and maximum DC current package. capability. TM TM SuperSOT -6 SuperSOT -8 SO-8 SOT-223 SOIC-16 SOT-23 S 1 6 D D 2 5 G D 3 3 pin 1 4 TM D SuperSOT -6 Absolute Maximum Ratings T = 25°C unless otherwise note A Symbol Parameter FDC653N Units Drain-Source Voltage 30 V V DSS V Gate-Source Voltage - Continuous ±20 V GSS I Drain Current - Continuous (Note 1a) 5 A D - Pulsed 15 Maximum Power Dissipation (Note 1a) 1.6 W P D (Note 1b) 0.8 T ,T Operating and Storage Temperature Range -55 to 150 °C J STG THERMAL CHARACTERISTICS R Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W qJA R Thermal Resistance, Junction-to-Case (Note 1) 30 °C/W qJC © 1997 FDC653N Rev.C .653
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