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FDC633N_NLFAIRCHILDN/a1255avai30V N-Channel Enhancement Mode Field Effect Transistor


FDC633N_NL ,30V N-Channel Enhancement Mode Field Effect TransistorELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)ASymbol Parameter Conditions Min Typ Ma ..
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FDC633N_NL
30V N-Channel Enhancement Mode Field Effect Transistor
March 1998 FDC633N N-Channel Enhancement Mode Field Effect Transistor General Description Features This N-Channel enhancement mode power field effect 5.2 A, 30 V.  R = 0.042 W @ V = 4.5 V DS(ON) GS transistors is produced using Fairchild's proprietary, high cell R = 0.054 W @ V = 2.5 V. DS(ON) GS density, DMOS technology. This very high density process is TM tailored to minimize on-state resistance. These devices are SuperSOT -6 package design using copper lead frame for particularly suited for low voltage applications in notebook superior thermal and electrical capabilities. computers, portable phones, PCMICA cards, and other High density cell design for extremely low R . battery powered circuits where fast switching,low in-line DS(ON) power loss and resistance to transients are needed in a very Exceptional on-resistance and maximum DC current small outline surface mount package. capability. TM TM SuperSOT -6 SOT-223 SOIC-16 SOT-23 SuperSOT -8 SO-8 S 1 6 D D 2 5 G 3 3 4 D pin 1 TM D SuperSOT -6 Absolute Maximum Ratings T = 25°C unless otherwise noted A Symbol Parameter FDC633N Units Drain-Source Voltage 30 V V DSS V Gate-Source Voltage - Continuous ±8 V GSS I Drain Current - Continuous (Note 1a) 5.2 A D - Pulsed 16 Maximum Power Dissipation (Note 1a) 1.6 W P D (Note 1b) 0.8 T ,T Operating and Storage Temperature Range -55 to 150 °C J STG THERMAL CHARACTERISTICS R Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W qJA R Thermal Resistance, Junction-to-Case (Note 1) 30 °C/W qJC © 1998 FDC633N Rev.C .633
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