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FDC6301N_NL |FDC6301NNLFAIRCHILD,FN/a1000000avaiDual N-Channel, Digital FET


FDC6301N_NL ,Dual N-Channel, Digital FETElectrical Characteristics (T = 25 C unless otherwise noted )ASymbol Parameter Conditions Min Typ M ..
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FDC6301N_NL
Dual N-Channel, Digital FET
September 2001 FDC6301N Dual N-Channel , Digital FET General Description Features 25 V, 0.22 A continuous, 0.5 A Peak. These dual N-Channel logic level enhancement mode field R = 5 W @ V = 2.7 V effect transistors are produced using Fairchild 's proprietary, DS(ON) GS high cell density, DMOS technology. This very high density R = 4 W @ V = 4.5 V. DS(ON) GS process is especially tailored to minimize on-state resistance. Very low level gate drive requirements allowing direct This device has been designed especially for low voltage operation in 3V circuits. V < 1.5V. applications as a replacement for digital transistors. Since bias GS(th) resistors are not required, these N-Channel FET's can replace Gate-Source Zener for ESD ruggedness. several digital transistors, with a variety of bias resistors. >6kV Human Body Model. TM TM -8 SOIC-16 SOT-23 SuperSOT -6 SuperSOT SO-8 SOT-223 Mark: .301 INVERTER APPLICATION Vcc 4 3 D OUT 5 2 IN G S 6 1 GND o Absolute Maximum Ratings T = 25 C unless other wise noted A Symbol Parameter FDC6301N Units , V Drain-Source Voltage, Power Supply Voltage 25 V V DSS CC V , V Gate-Source Voltage, V 5.0 - V GSS IN IN I , I Drain/Output Current - Continuous 0.22 A D OUT - Pulsed 0.5 P Maximum Power Dissipation (Note 1a) 0.9 W D (Note 1b) 0.7 T ,T Operating and Storage Temperature Range -55 to 150 °C J STG ESD Electrostatic Discharge Rating MIL-STD-883D 6.0 kV Human Body Model (100pf / 1500 Ohm) THERMAL CHARACTERISTICS R Thermal Resistance, Junction-to-Ambient (Note 1a) 140 °C/W qJA R Thermal Resistance, Junction-to-Case (Note 1) 60 °C/W qJC © 2001 FDC6301N Rev.D to+8
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