FAN5078 ,DDR/ACPI Regulator ComboFeatures Description The FAN5078 DDR memory regulator combines a high- PWM regulator for VDDQ (2.5 ..
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FAN5090MTC ,Two Phase Interleaved Synchronous Buck ConverterApplicationsout, over-voltage protection, and adjustable current limiting • Power supply for Penti ..
FAN5090MTC ,Two Phase Interleaved Synchronous Buck Converter FAN5090Two Phase Interleaved Synchronous Buck Converter for VRM 9.x
FAN5090MTCX ,Two Phase Interleaved Synchronous Buck Converterapplications while • Remote sense minimizing external components. • Programmable Active Droop (Vo ..
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FIN1028MX ,3.3V LVDS 2-Bit High Speed Differential ReceiverFIN1028 3.3V LVDS 2-Bit High Speed Differential ReceiverMarch 2001Revised May 2004FIN10283.3V LVDS ..
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FAN5078
DDR/ACPI Regulator Combo
FAN5078 DDR/ACPI Regulator Combo May 2006 FAN5078 DDR/ACPI Regulator Combo Features Description The FAN5078 DDR memory regulator combines a high- PWM regulator for VDDQ (2.5V or 1.8) efficiency Pulse-Width Modulated (PWM) controller to Linear LDO regulator generates VTT = VDDQ/2, generate the memory supply voltage, VDDQ, and a linear 1.5A Peak sink/source capability regulator to generate termination voltage (VTT). AMT / M-state support Synchronous rectification provides high efficiency over a wide range of load currents. Efficiency is further enhanced by using Control to generate 5V USB the low-side MOSFET’s R to sense current. DS(ON) ACPI drive and control for 5V DUAL generation The VDDQ PWM regulator is a sampled current mode control 3.3V internal LDO for 3V-ALW generation with external compensation to achieve fast load-transient response and provide system design optimization. 300 kHz fixed frequency switching The VTT regulator derives its reference and takes its power R current sensing or optional current sense resistor DS(ON) from the VDDQ PWM regulator, output. The VTT termination for precision over-current detect regulator is capable of sourcing or sinking 1.5A peak currents. Internal synchronous boot diode In S5 M1 mode, the VDDQ switcher, VTT regulator, and the Common Power Good signal for all voltages 3.3V regulators remain on. S3 mode keeps these regulators Input under-voltage lockout (UVLO) on, but also turns on an external P-Channel to provide 5V USB. Thermal shutdown A single soft-start capacitor enables controlled slew rates for Latched multi-fault protection both VDDQ and 3.3V-ALW outputs. Precision reference output for ULDO controllers PGOOD becomes true in S0 only after all regulators have 24-pin 5 x 5 MLP package achieved stable outputs. In S5 (EN = 0), the 3.3V internal LDO stays on while the other Applications regulators are powered down. DDR VDDQ and VTT voltage generation with ACPI support Desktop PC's Servers Ordering Information Part Number Temperature Range Package Packing FAN5078MPX -10°C to 85°C MLP-24 5x5mm Tape and Reel © 2006 FAN5078 Rev. 1.0.0 • 05/09/06
