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DS91M040TSQ/NOPB |DS91M040TSQNOPBNSCN/a690avai125 MHz Quad M-LVDS Transceiver 32-WQFN -40 to 85


DS91M040TSQ/NOPB ,125 MHz Quad M-LVDS Transceiver 32-WQFN -40 to 85FEATURES DESCRIPTIONThe DS91M040 is a quad M-LVDS transceiver2• DC - 125 MHz / 250 Mbps Low Jitter, ..
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DS91M040TSQ/NOPB
125 MHz Quad M-LVDS Transceiver
RT RT RTLine Card in SLOT 1
BACKPLANE
DS91M040
Line Card in SLOT N-1
M-LVDS Receivers
RT = ZLOADED
Line Card in SLOT N
M-LVDS Receivers
The DS91M040 isa quad M-LVDS transceiver DC- 125 MHz/ 250 Mbps Low Jitter, Low designed for driving/ receiving clockor data signalsSkew, Low Power Operation to/ fromupto four multipoint networks.• Wide Input Common Mode Voltage Range M-LVDS (Multipoint LVDS)isa new familyof busAllows upto ±1Vof GND Noise interface devices based on LVDS technology• Conformsto TIA/EIA-899 M-LVDS Standard specifically designed for multipoint and multidrop• Pin Selectable M-LVDS Receiver Type(1or2) cable and backplane applications.It differs from
standard LVDSin providing increased drive currentto• Controlled Transition Times (2.0 ns typ) handle double terminations that are requiredin multi-Minimize Reflections point applications. Controlled transition times• 8 kV ESD on M-LVDS I/O pins protects minimize reflections that are commonin multipointadjoining components configurations due to unterminated stubs. M-LVDS Flow-Through Pinout Simplifies PCB Layout devices also havea very large input common mode
voltage range for additional noise marginin heavily• Small5 mmx5 mm WQFN-32 Space Saving loaded and noisy backplane environments.Package single DS91M040 channel is a half-duplexAPPLICATIONS transceiver that accepts LVTTL/LVCMOS signalsat
the driver inputs and converts themto differential M-• Multidrop/ Multipoint Clock and Data LVDS signal levels. The receiver inputs accept lowDistribution voltage differential signals (LVDS, BLVDS, M-LVDS, High-Speed, Low Power, Short-Reach LVPECL and CML) and convert themto 3V LVCMOS
Alternativeto TIA/EIA-485/422
signals. The DS91M040 supports both M-LVDS type and type2 receiver inputs.• Clock Distributionin AdvancedTCA (ATCA)
and MicroTCA (μTCA, uTCA) Backplanes
System Diagram
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