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DS90LV018ATM NOPB-DS90LV018ATMX/NOPB Fast Delivery,Good Price
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DS90LV018ATM NOPB |DS90LV018ATMNOPBNSCN/a7375avai3V LVDS Single CMOS Differential Line Receiver 8-SOIC -40 to 85
DS90LV018ATMX/NOPB |DS90LV018ATMXNOPBNSCN/a1292avai3V LVDS Single CMOS Differential Line Receiver 8-SOIC -40 to 85


DS90LV018ATM NOPB ,3V LVDS Single CMOS Differential Line Receiver 8-SOIC -40 to 85Electrical Characteristics(1)(2)Over Supply Voltage and Operating Temperature ranges, unless otherw ..
DS90LV018ATMX ,3V LVDS Single CMOS Differential Line ReceiverElectrical Characteristics” specifies conditions of device operation.Note2: Current into device pin ..
DS90LV018ATMX/NOPB ,3V LVDS Single CMOS Differential Line Receiver 8-SOIC -40 to 85FEATURES DESCRIPTIONThe DS90LV018A is a single CMOS differential line2• >400 Mbps (200 MHz) Switchi ..
DS90LV019TM ,3.3V or 5V LVDS Driver/Receiverfeatures a flow-through pin out which allowsn ±100 mV Receiver Sensitivityeasy PCB routing for shor ..
DS90LV019TM/NOPB ,3.3V or 5V LVDS Driver/Receiver 14-SOIC -40 to 85Maximum Ratings (Note 1) Derate SOIC Package 7.7mW/˚CTSSOP 790 mWIf Military/Aerospace specified de ..
DS90LV019TMTC ,3.3V or 5V LVDS Driver/Receiverfeatures an independentn Glitch free power up/down (Driver disabled)driver and receiver with TTL/CM ..


DS90LV018ATM NOPB-DS90LV018ATMX/NOPB
3V LVDS Single CMOS Differential Line Receiver 8-SOIC -40 to 85
DS90LV018A
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SNLS014D–JUNE 1998–REVISED APRIL 2013
DS90LV018A 3V LVDS Single CMOS Differential Line Receiver
Checkfor Samples: DS90LV018A
1FEATURES DESCRIPTION

The DS90LV018Aisa single CMOS differential line >400 Mbps (200 MHz) Switching Rates receiver designed for applications requiring ultra low• 50ps Differential Skew (Typical) power dissipation, low noise and high data rates. The 2.5 ns Maximum Propagation Delay deviceis designedto support data ratesin excessof
400 Mbps (200 MHz) utilizing Low Voltage Differential• 3.3V Power Supply Design Signaling (LVDS) technology.• Flow-Through Pinout
The DS90LV018A accepts low voltage (350 mV• Power Down High Impedance on LVDS Inputs typical) differential input signals and translates them• Low Power Design (18mW@ 3.3V Static) to 3V CMOS output levels. The receiver also Interoperable with Existing 5V LVDS Networks supports open, shorted and terminated (100Ω) input
fail-safe. The receiver output willbe HIGH forall fail-• Accepts Small Swing (350 mV Typical) safe conditions. The DS90LV018A hasa flow-throughDifferential Signal Levels design for easy PCB layout.• Supports Open, Short and Terminated Input
The DS90LV018A and companion LVDS line driverFail-Safe providea new alternativeto high power PECL/ECL• Conformsto ANSI/TIA/EIA-644 Standard devices for high speed point-to-point interface• Industrial Temperature Operating Range applications. (−40°Cto +85°C) Availablein SOIC Package
Connection Diagram
Figure1. SOIC
See Package NumberD (R-PDSO-G8)
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