DS90CR486VS/NOPB ,Deserializer 100-TQFP -10 to 70FEATURESgenerations of Channel Link devices and offers2• Up to 6.384 Gbps Throughputhigher bandwidt ..
DS90CR561MTD ,LVDS 18-Bit Color Flat Panel Display (FPD) Link [Life-time buy]General Descriptionproblems associated with wide, high speed TTL interfaces.The DS90CR561 transmitt ..
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DS90CR486VS/NOPB
Deserializer 100-TQFP -10 to 70
DS90CR486
www.ti.com SNLS149C–FEBRUARY 2003–REVISED MARCH 2013
DS90CR486 133MHz 48-Bit Channel Link Deserializer (6.384 Gbps)
Checkfor Samples: DS90CR486The DS90CR486 deserializeris improved over prior
1FEATURESgenerations of Channel Link devices and offers
Upto 6.384 Gbps Throughput higher bandwidth support and longer cable drive with
66MHzto 133MHz Input Clock Support three areasof enhancement. To increase bandwidth,
the maximum clock rateis increasedto 133 MHz and
• Reduces Cable and Connector Size and Cost 8 serialized LVDS outputs are provided. Cable drive
• Cable Deskew Function is enhanced witha user selectable pre-emphasis (on
• DC Balance Reduces ISI Distortion DS90CR485) feature that provides additional output
current during transitionsto counteract cable loading
• For Point-to-Point Backplaneor Cableeffects. Optional DC balancing ona cycle-to-cycle
Applications basis,is also providedto reduce ISI (Inter-Symbol
• Low Power, 890 mW Typat 133MHz Interference). With pre-emphasis and DC balancing,
• Flow through Pinout for Easy PCB Design a low distortion eye-patternis providedat the receiver
endof the cable.A cable deskew capability has been
• +3.3V Supply Voltageaddedto deskew long cablesof pair-to-pair skew.
• 100-pin TQFP Package These three enhancements allow long cablesto be
• Conformsto TIA/EIA-644-A-2001 LVDS driven.
Standard The DS90CR486is intended to be used with the
DS90CR485 Channel Link Serializer.It is also
DESCRIPTION backward compatible with serializers DS90CR481The DS90CR486 receiver converts eight Low Voltage and DS90CR483. The DS90CR486 is footprintDifferential Signaling (LVDS) data streams back into compatible with the DS90CR484.48 bitsof LVCMOS/LVTTL data. Usinga 133MHz The chipsetis an ideal solutionto solve EMI andclock, the data throughput is 6.384Gbit/s interconnect size problems for high-throughput point-(798Mbytes/s). to-point applications.The multiplexingof data lines providesa substantial For more details, please referto the APPLICATIONScable reduction. Long distance parallel single-ended INFORMATION sectionof this datasheet.buses typically requirea ground wire per active signal
(and have very limited noise rejection capability).
Thus, fora 48-bit wide data and one clock, upto 98
conductors are required. With this Channel Link
chipsetas fewas19 conductors(8 data pairs,1 clock one ground) are needed. This interconnect width, savings, reduces and reduces due to the cables' smaller
