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DS90C402MX/NOPB |DS90C402MXNOPBTIN/a2404avaiDual Low Voltage Differential Signaling (LVDS) Receiver 8-SOIC -40 to 85


DS90C402MX/NOPB ,Dual Low Voltage Differential Signaling (LVDS) Receiver 8-SOIC -40 to 85 SNLS001C –JUNE 1998–REVISED APRIL 2013Switching Characteristics(1)(2)(3)(4)(5)V = +5.0V ± 10%, T = ..
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DS90C402MX/NOPB
Dual Low Voltage Differential Signaling (LVDS) Receiver
DS90C402
www.ti.com
SNLS001C–JUNE 1998–REVISED APRIL 2013
DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
Checkfor Samples: DS90C402
1FEATURES DESCRIPTION

The DS90C402isa dual receiver device optimized Ultra Low Power Dissipation for high data rate and low power applications. This• Operates above 155.5 Mbps device along with the DS90C401 providesa pair chip Standard TIA/EIA-644 solution fora dual high speed point-to-point interface.
The deviceisina PCB space saving8 lead small• 8 Lead SOIC Package saves PCB space outline package. The receiver offers ±100 mV• VCM ±1V center around 1.2V threshold sensitivity,in addition to common-mode• ±100 mV Receiver Sensitivity noise protection.
Connection Diagram
See Package NumberD (SOIC)
Functional Diagram

These devices have limited built-in ESD protection. The leads shouldbe shorted togetherorthe device placedin conductive foamto prevent electrostatic damagetothe MOS gates.
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