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DS3050W-100 |DS3050W100MAXIMN/a1500avai3.3V Single-Piece 4Mb Nonvolatile SRAM with Clock


DS3050W-100 ,3.3V Single-Piece 4Mb Nonvolatile SRAM with ClockApplicationsTimerRAID Systems and Servers Gaming♦ Industrial Temperature Range (-40°C to + 85°C)POS ..
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DS3050W-100
3.3V Single-Piece 4Mb Nonvolatile SRAM with Clock
General Description
The DS3050W consists of a static RAM, a nonvolatile
(NV) controller, a year 2000-compliant real-time clock
(RTC), and an internal rechargeable manganese lithium
(ML) battery. These components are encased in a sur-
face-mount module with a 256-ball BGA footprint.
Whenever VCCis applied to the module, it recharges
the ML battery, powers the clock and SRAM from the
external power source, and allows the contents of the
clock registers or SRAM to be modified. When VCC is
powered down or out-of-tolerance, the controller write-
protects the memory contents and powers the clock
and SRAM from the battery. The DS3050W also con-
tains a power-supply monitor output (RST), as well as a
user-programmable interrupt output (IRQ/FT).
Applications

RAID Systems and ServersGaming
POS TerminalsFire Alarms
Industrial ControllersPLCs
Data-Acquisition SystemsRouters/Switches
Features
Single-Piece, Reflowable, 27mm x 27mm BGA
Package Footprint
Internal Manganese Lithium Battery and ChargerIntegrated Real-Time ClockUnconditionally Write-Protects the Clock and
SRAM when VCCis Out-of-Tolerance
Automatically Switches to Battery Supply when
VCCPower Failures Occur
Reset Output can be Used as a CPU SupervisorInterrupt Output can be Used as a CPU Watchdog
Timer
Industrial Temperature Range (-40°C to + 85°C)UL Recognized
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
Typical Operating Circuit

Rev 0; 4/05
Ordering Information
Pin Configuration appears at end of data sheet.
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on Any Pin Relative to Ground......-0.3V to +4.6V
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range...............................-40°C to +85°C
Soldering Temperature Range.......See IPC/JEDEC J-STD-020C
PIN CAPACITANCE
DC ELECTRICAL CHARACTERISTICS
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
AC ELECTRICAL CHARACTERISTICS
POWER-DOWN/POWER-UP TIMING
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
Note 1:
IRQ/FT and RSTare open-drain outputs and cannot source current. External pullup resistors should be connected to these
pins to realize a logic-high level.
Note 2:
These parameters are sampled with a 5pF load and are not 100% tested.
Note 3:
tWPis specified as the logical AND of CEwith WEfor SRAM writes, or CSwith WEfor RTC writes. tWPis measured from
the latter of the two related edges going low to the earlier of the two related edges going high.
Note 4:
tWR1and tDH1are measured from WEgoing high.
Note 5:
tWR2and tDH2are measured from CEgoing high for SRAM writes or CSgoing high for RTC writes.
Note 6:
tDSis measured from the earlier of CEor WEgoing high for SRAM writes, or from the earlier of CSor WEgoing high for
RTC writes.
Note 7:
In a power-down condition, the voltage on any pin may not exceed the voltage on VCC.
Note 8:
The expected tDRis defined as accumulative time in the absence of VCCstarting from the time power is first applied by the
user. Minimum expected data-retention time is based upon a maximum of two +230°C convection reflow exposures, fol-
lowed by a fully charged cell. Full charge occurs with the initial application of VCCfor a minimum of 96 hours. This parame-
ter is assured by component selection, process control, and design. It is not measured directly during production testing.
Note 9:
WEis high for any read cycle.
Note 10:
OE= VIHor VIL. If OE= VIHduring write cycle, the output buffers remain in a high-impedance state.
Note 11:
If the CEor CSlow transition occurs simultaneously with or latter than the WElow transition, the output buffers remain in a
high-impedance state during this period.
Note 12:
If the CEor CShigh transition occurs prior to or simultaneously with the WEhigh transition, the output buffers remain in a
high-impedance state during this period.
Note 13:
If WEis low or the WElow transition occurs prior to or simultaneously with the related CEor CSlow transition, the output
buffers remain in a high-impedance state during this period.
DATA RETENTION
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
Read Cycle
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
Write Cycle 1
Write Cycle 2
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
Power-Down/Power-Up Condition
Typical Operating Characteristics

(VCC= 3.3V, TA= +25°C, unless otherwise noted.)
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clockypical Operating Characteristics (continued)

(VCC= 3.3V, TA= +25°C, unless otherwise noted.)
DS3050W
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
Pin Description
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