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DS2890DALLASN/a371avai1-Wire Digital Potentiometer


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DS2890
1-Wire Digital Potentiometer
FEATURESSingle element 256-position linear taper
potentiometerSupports potentiometer terminal working
voltages up to 11VPotentiometer terminal voltage independent
of supply voltagePotentiometer wiper position controlled and
read over minimal 1-Wire bus interface100 k� resistor element valueT0-92 package provides a 1-Wire® variable
resistor configurationSupports Conditional Search based on
power-on default wiper positionMultiple DS2890’s can be identified on a
common 1-Wire bus and operated
independentlyUnique factory lasered 64-bit registration
number assures error free device selectionand absolute part identityBuilt-in multi-drop controller ensures
compatibility with other 1-Wire Network
productsSupports Overdrive mode which boostscommunication speed up to 142 kbits per
second-40oC to +85oC operating temperature range2.8V – 6.0V operating voltage range
PIN ASSIGNMENT
Top View6-pin TSOC

1-WIRE
GND
VDDRH
WIPER
TO-92 Package

GND
WIR3
Bottom View
Flip Chip Package

side view
Visit www.dalsemi.com for Flip Chip pinout andmechanical data.
ORDERING INFORMATION
PART NUMBERRESISTANCE*PACKAGE DESCRIPTION

DS2890-000100 k�T0-92
DS2890P-000100 k�6-pin TSOC
DS2890X-000100 k�Flip Chip Pkg., Tape & Reel
DS2890-000/T&R100 k�Tape & Reel of DS2890
DS2890P-000/T&R100 k�Tape & Reel of DS2890P
* Contact the factory for availability of alternate resistance values
DS2890
1-Wire
DS2890
PIN DESCRIPTION
DESCRIPTION

The DS2890 is a linear taper digitally controlled potentiometer with 256 wiper positions. Device
operation, including wiper position, is controlled over the single contact 1-Wire bus for the ultimate in
electrical interface simplicity. With a wide 0–11 volt working voltage range for the potentiometerterminals, the DS2890 is ideal for a broad range of industrial and control applications. Potentiometer
terminal voltage is independent of device supply voltage as well as the voltage applied to the other
potentiometer terminals. Communication with the DS2890 follows the standard Dallas Semiconductor
1-Wire protocol and can be accomplished with minimal hardware such as a single port pin of a
microcontroller. Multiple DS2890 devices can reside on a common 1-Wire bus and be operatedindependently of each other. Each DS2890 has its own unalterable 64-bit ROM registration number that
is factory lasered into the chip. The registration number guarantees unique identification for absolute
traceability and is used to address the device in a multi-drop 1-Wire Network environment. The DS2890
will respond to a 1-Wire Conditional Search command if the potentiometer wiper is set at the power-on
default position. This feature enables the bus master to easily determine whether a potentiometer hasgone through a power-on reset and needs to be re-configured with a required wiper position setting. The
DS2890 supports two power modes: a) 1-Wire only mode in which device power is supplied parasitically
from the 1-Wire and b) VDD mode where power is supplied from an external supply With a VDD supply
the device can support both a potentiometer and variable resistor configuration. When operating in a 1-
Wire only power mode the device supports only a variable resistor configuration.
DS2890
OPERATION

The DS2890 is a single element digital potentiometer; a block diagram of the device is shown in Figure 1.
The device has a total of 256 linearly spaced tap points including the RL and RH terminals; a total of 255
resistive segments exist between the RL and RH terminals. These tap points are accessible to the WIPER
terminal whose position is controlled via the 1-Wire bus interface. Wiper position and device state are
maintained as long as the 1-Wire bus is active or the VDD supply is applied within operating limits.Otherwise, a power-on reset will occur and the wiper position and operating state will return to power-on
default conditions.
FIGURE 1. DS2890 BLOCK DIAGRAM
As shown in the figure the device has five major elements: the 1-Wire Function Controller, the
Potentiometer Controller, the 64-bit ROM, the resistor array, and Parasite Power circuitry. Each of these
elements is discussed in detail throughout the remainder of the data sheet. DS2890 control including
device selection, positioning/reading the potentiometer wiper, and device operating state is performed
over the 1-Wire bus. The hierarchical structure of the 1-Wire protocol as applicable to the DS2890 isshown in Figure 2. As shown, the control sequence starts with the 1-Wire bus master issuing one of eight
ROM function commands. After a ROM function command is successfully completed potentiometer
functions may be executed. The protocol for ROM and potentiometer functions are described in the
“COMMAND FLOW” section. For the 3-pin TO-92 package configuration and operation see the
“TO-92 PACKAGE OPERATION” section.
DS2890
FIGURE 2. 1-Wire Command Hierarchical Structure
DATA I/O BIT ORDER

All data is read and written least significant bit (LSB) first.
POTENTIOMETER FEATURE REGISTER

Although the feature set of the DS2890 is primarily fixed, a mechanism to identify feature characteristics
of future 1-Wire potentiometers has been developed and implemented in the DS2890. As shown in
Figure 3, the feature register is an encoded read-only byte that describes the characteristics of the DS2890and future 1-Wire potentiometers. Feature values that correspond to the DS2890 are highlighted. The
feature register is read with the READ CONTROL REGISTER potentiometer function command (see
“POTENTIOMETER FUNCTION COMMANDS”).
DS2890
FIGURE 3. 1-WIRE POTENTIOMETER FEATURE REGISTER
Feature Register Bit Encoding
Feature Register Bit Definitions

DS2890 feature values are highlighted:
The DS2890 will respond with a feature register value of F3h when a READ CONTROL
REGISTER command is executed, see section “POTENTIOMETER FUNCTION COMMANDS”.
POTENTIOMETER CONTROL REGISTER

The potentiometer control register is used to turn on/off the DS2890 charge pump (see section
“POTENTIOMETER WIPER RESISTANCE AND CHARGE PUMP CONSIDERATIONS” for a
DS2890
FIGURE 4. POTENTIOMETER CONTROL REGISTER
Control Register Bit Encoding
Control Register Bit Definitions*
*Note:

Control Register power-on defaults: Charge Pump is OFF (CPC=0), Wiper Number to control is wiper #1
(WN=00b, WN=11b).
Valid DS2890 control values are highlighted:Thus for the DS2890, valid control register values are:
As shown in Figure 22 and discussed in the “POTENTIOMETER FUNCTION COMMANDS” section,
no change in device state will occur if an invalid control register value is sent.
DS2890
POWER and CONFIGURATION CONSIDERATIONS

1-Wire devices can typically derive operating power entirely from the 1-Wire bus by storing energy on an
internal capacitor during periods of time when the 1-Wire bus is in a high state. During bus low times the
device continues to operate from the energy stored on the internal capacitor; the capacitor is then
recharged when the bus returns to a high state. This technique of operating entirely from the 1-Wire bus
by powering from energy stored on an internal capacitor during bus low times in known as “parasitepowered” operation. Special consideration is required with the DS2890 in that it supports two power
configurations and two related digital resistor modes: Potentiometer Configuration and Variable Resistor
Configuration. The Potentiometer Configuration requires the presence of a VDD power source to supply
the power needs of the device charge pump which must be turned on to support a terminal-to-terminal
wiper output range. The Variable Resistor configuration is supported with or without a VDD source orenabled charge pump although resistance range, as described below, is influenced by the charge pump
state.
POTENTIOMETER CONFIGURATION

To configure and operate the DS2890 as a potentiometer as shown in Figure 5 requires the TSOC or flip
chip package, a VDD power source, and the device charge pump turned on (Control Register, bit
CPC=1). The charge pump must be enabled to support RL to RH terminal voltage swings at the WIPERoutput and as described previously, a VDD supply must be provided to support the power requirements
of the charge pump.
Figure 5. Potentiometer Configuration

WIPER
2.8V to 6.0V
VARIABLE RESISTOR CONFIGURATION

The Variable Resistor configuration as shown in Figure 6 is supported by all package types with or
without an external VDD supply. As described previously, without a VDD source the charge pump mustbe disabled.
DS2890
Figure 6. Variable Resistor Configurations

(TO92 Package)
2.8V to 6.0V
2.8V to 6.0V
2.8V to 6.0V
WIPER RESISTANCECONSIDERATIONS
simplified diagram of the DS2890 resistor array for the potentiometer configuration is shown in
FIGURE 8. In this figure the
rDS resistance of the wiper transistors in Figure 1 are modeled as wiper
resistance RWIPER. The value of RWIPER varies with device configuration, operational state, and wiper
terminal voltage. Wiper resistance is significantly reduced when an external VDD supply is used and the
device charge pump is enabled. A wiper resistance graph with the charge pump enabled is shown in
FIGURE 10.

FIGURE 8. Potentiometer Resistor Model
WIPER
DS2890
FIGURE 10. Typical Wiper Resistance vs Wiper Voltage at 25oC,
Charge Pump ON

Voltage Across Wiper (V)
Wiper
esistance (ohms)
When packaged in a 3-pin TO-92 or configured as a variable resistor, the DS2890 takes on aconfiguration as shown in FIGURE 11, a simplified model is shown in Figure 12. As shown, the RL and
Wiper terminals and are connected to GND and the resistance between the RH terminal and GND is
varied. As described previously, the DS2890 charge pump must be turned off (default state) for operation
with the TO-92 package or when VDD is not applied. Wiper resistance for a configuration with the
charge pump disabled is shown in FIGURE 13.
DS2890
FIGURE 11. DS2890 TO-92 CONFIGURATION BLOCK DIAGRAM
Figure 12. VARIABLE RESISTOR MODEL
WIPER
DS2890
FIGURE 13. Typical Wiper Resistance vs Wiper Voltage at 25oC,
Charge Pump OFF

Voltage Across Wiper (Volts)
iper
Resistance (Kohm
64-BIT LASTERED ROM
Each DS2890 contains a unique and unalterable lasered ROM registration number that is 64 bits long; the
format of this value is shown in Figure 15. The first 8 bits are a 1-Wire family code; the family code for
the DS2890 and future 1-Wire Potentiometers is 2Ch. The next 48 bits are a unique serial number that isadministered by Dallas Semiconductor. The last 8 bits are a CRC of the first 56 bits. The 1-Wire CRC is
generated using a polynomial generator consisting of a shift register and XOR gates as shown in Figure
16. Operationally, the CRC generator works as follows: The shift register bits are first initialized to zero.
Then starting with the least significant bit, the 8-bit family code is shifted in. After the 8th bit of the
family code has been entered, the 48-bit serial number is shifted in. After shifting in the 48th bit of theserial number the shift register contains the CRC value. Shifting in the 8 bits of CRC should return the
shift register to an all zeros value. The 64-bit ROM and the 1-Wire Function Controller portions of the
DS2890 allow the device to operate as a 1-Wire device and follow the protocol detailed in the section
“TRANSACTION SEQUENCE”.
FIGURE 15. 64-BIT LASERED ROM
MSBLSB
MSBLSBMSBLSBMSBLSB
DS2890
FIGURE 16. 1-WIRE CRC GENERATOR2X1X0X7X6X5X4X3
INPUT DATA
Polynomial = X8 + X5 + X4 + 1
POTENTIOMETER FUNCTION COMMANDS

Once the bus master has completed a ROM command sequence, one of six DS2890 potentiometerfunction commands can be issued. The Potentiometer Function Command flow charts, Figure 21 and
Figure 22, describe the protocols necessary for adjusting or reading the potentiometer wiper position or
controlling the operating state of the DS2890. All potentiometer functions consist of a single command
byte followed by one or more bytes of data or control written/read by the bus master. All data transferred
between the DS2890 and the bus master are communicated least significant bit first.
READ POSITION [F0H]

The Read Position command is used to obtain the wiper setting of the potentiometer currently addressed
by the Control Register. Although the DS2890 is a single element potentiometer, wiper addressing still
applies and the Control Register wiper number used for addressing must be set accordingly. In addition
to wiper position, the Control Register byte will be returned with a Read Position command. This enables
the bus master to easily confirm/determine the currently addressed potentiometer wiper. Following theRead Position command byte, the bus master reads 16 bits to obtain first the Control Register byte then
the wiper position byte. The DS2890 will respond with 0’s to additional reads after the 8 bit of the
position byte. The Read Position command is terminated with a Reset pulse.
WRITE POSITION [0FH]

The Write Position command is used to set the position of the currently addressed potentiometer wiper.Although the DS2890 is a single element potentiometer, wiper addressing still applies and the Control
Register wiper number used for addressing must be set accordingly. The bus master follows the Write
Position command byte with an 8-bit wiper position value. Following the 8th bit of the position byte, the
bus master reads back the 8-bit position value from the DS2890 to confirm that the value was received
correctly by the device. If an incorrect value is read back, the bus master must issue a Reset pulse andrepeat the sequence. If the value read back is correct, the bus master then sends the 8-bit release code
(96h). If the DS2890 accurately receives the release code, the wiper position is updated and the device
will respond with 0’s to additional reads by the bus master. If an invalid release code is received, no
change is made to the wiper position and the device will respond with 1’s to additional reads by the bus
master. The Write Position command is terminated with a Reset pulse.
DS2890
READ CONTROL REGISTER [AAH]

The Read Control Register command is used to obtain both the Control Register and potentiometer
Feature Register. Following the Read Control Register command byte, the bus master reads 16 bits to
obtain first the Feature Register byte and then the Control Register byte. The DS2890 will respond with
0’s to additional reads after the 8 bit of the Control Register byte. The Read Control Register command
is terminated with a Reset pulse.
WRITE CONTROL REGISTER [55H]

The Write Control Register command is used to manipulate DS2890 state bits located in the Control
Register. This command is used to set the potentiometer wiper address and charge pump state. The bus
master follows the Write Control Register command byte with an 8-bit register value. Following the 8th
bit of the register byte, the bus master reads back the 8-bit control value from the DS2890 to confirm that
the device received the correct value (Note that if an invalid register value was received by the DS2890,the bus master will read all 1’s (FFh) during the read back sequence.). If a value other than FFh is read,
the bus master determines if the DS2890 received the correct value. If an incorrect value is read back, the
bus master must issue a Reset pulse and repeat the sequence. If the value read back is correct, the bus
master then sends the 8-bit release code (96h). If the DS2890 accurately receives the release code, theControl Register is updated and the device will respond with 0’s to additional reads by the bus master. If
an invalid release code is received, no change is made to the Control Register and the device will respond
with 1’s to additional reads by the bus master. The Write Control Register command is terminated with a
Reset pulse.
INCREMENT [C3H]

The Increment command is used for a one step position increase of the currently addressed potentiometerwiper. Although the DS2890 is a single element potentiometer, wiper addressing still applies and the
Control Register wiper number used for addressing must be set accordingly. The bus master follows the
Increment command byte with an 8-bit read to which the DS2890 will respond with the new 8-bit wiper
position set point. No position change is made if the DS2890 wiper is at the maximum position (FFh)
and an Increment command is received. One difference between the Increment/Decrement commandsand other potentiometer functions is that upon completion of either of these commands, 1-Wire command
processing remains at the potentiometer function level. As shown in Figure 21, additional potentiometer
commands may be sent without going through the ROM function flow.
DECREMENT [99H]

The Decrement command is used for a one step position decrease of the currently addressedpotentiometer wiper. Although the DS2890 is a single element potentiometer, wiper addressing still
applies and the Control Register wiper number used for addressing must be set accordingly. The bus
master follows the Decrement command byte with an 8-bit read to which the DS2890 will respond with
the new 8-bit wiper position set point. No position change is made if the DS2890 wiper is at the
minimum position (00h) and a Decrement command is received. One difference between theIncrement/Decrement commands and other potentiometer functions is that upon completion of either of
these commands, 1-Wire command processing remains at the potentiometer function level. As shown in
Figure 21, additional potentiometer commands may be sent without going through the ROM function
flow.
DS2890
1-WIRE BUS SYSTEM

The 1-Wire bus is a system, which has a single bus master and one or more slaves. In all instances the
DS2890 is a slave device. The bus master is typically a microcontroller. The discussion of this bus system
is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire signaling
(signal types and timing). The 1-Wire protocol defines bus transactions in terms of the bus state during
specific time slots that are initiated on the falling edge of sync pulses from the bus master.
HARDWARE CONFIGURATION

The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open
drain or 3-state outputs. The 1-Wire port of the DS2890 is open drain with an internal circuit equivalent
to that shown in Figure 9. A multi-drop bus consists of a 1-Wire bus with multiple slaves attached. At
regular speed the 1-Wire bus has a maximum data rate of 16.3 kbits per second. The speed can be boostedto 142 kbits per second by activating the Overdrive Mode. For a discrete bus master interface as in
Figure 17, the 1-Wire bus requires a pull-up resistor with a minimum value of 2.2 k�. Depending on
1-Wire communication speed, regular or overdrive, and bus load characteristics, the optimal pull-up
resistor value will be in the 1.5 k� to 5 k� range. Figure 18 shows a DS2480B bus master configurationwith an interface to the host CPU serial port. Among many features, the DS2480B simplifies the 1-Wire
interface design, generates slew-rate controlled 1-Wire waveforms, and off-loads 1-Wire timing
generation overhead required in a discrete solution.
The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus
MUST be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low
for more than 16 µs (Overdrive Speed) or more than 120 µs (regular speed), one or more devices on the
bus may be reset.
FIGURE 17. HARDWARE CONFIGURATION
DS2890 1-WIRE PORT
BUS MASTER
VPUP
NOTE:

Depending on 1-Wire communication speed, regular or overdrive, and bus load characteristics, the
optimal pull-up resistor value will be in the 1.5 k� to 5 k� range.
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