DS2480B ,Serial 1-Wire Line Driver with Load Sensorblock diagram (see Figure 1). The device gets its input data from the serial communication port of ..
DS2480B ,Serial 1-Wire Line Driver with Load SensorPIN DESCRIPTION (default), 19.2kbps, 57.6kbps, and 115.2kbps GND - Ground o Self-Calibrating Ti ..
DS2480B+ ,Serial to 1-Wire Line DriverPIN DESCRIPTION (default), 19.2kbps, 57.6kbps, and 115.2kbps GND - Ground o Self-Calibrating Ti ..
DS2480B+T , Serial to 1-Wire Line Driver
DS2480S ,Serial 1-Wire Line DriverPIN DESCRIPTIONPIN SYMBOL DESCRIPTION1 GND Ground Pin: common ground reference and ground return fo ..
DS2480S ,Serial 1-Wire Line DriverPIN DESCRIPTIONpull–up for Crypto iButton, sensors and EEPROM GND Ground1–W 1–Wire Input/Output• Se ..
E53NA50 ,NABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Drain-source Voltage (V =0) 500 VDS GSV 500 VD ..
EA2-12 ,COMPACT AND LIGHTWEIGHTAPPLICATIONSElectronic switching systems, PBX, key telephone systems, automatic test equipment and ..
EA2-12NU ,COMPACT AND LIGHTWEIGHTFEATURESª Low power consumptionª Compact and light weightª 2 form c contact arrangementª Low magnet ..
EA2-12S ,COMPACT AND LIGHTWEIGHTFEATURESª Low power consumptionª Compact and light weightª 2 form c contact arrangementª Low magnet ..
EA2-12TNU ,COMPACT AND LIGHTWEIGHTAPPLICATIONSElectronic switching systems, PBX, key telephone systems, automatic test equipment and ..
EA2-4.5NU ,COMPACT AND LIGHTWEIGHTAPPLICATIONSElectronic switching systems, PBX, key telephone systems, automatic test equipment and ..
DS2480B
Serial 1-Wire Line Driver with Load Sensor
BENEFITS AND FEATURES • Simplifies the Design of a Low-Cost, Universal
RS-232 COM Port to 1-Wire® Interface
True-Ground Interface to an RS-232 COM Port for Reading
and Writing 1-Wire Devices Works with Bipolar as well as Unipolar Logic
Signals Slew Rate Controlled 1-Wire Pulldown and
Active Pullup to Accommodate Long Lines
and Reduce Radiation Communicates at Data Rates of 9.6kbps
(default), 19.2kbps, 57.6kbps, and 115.2kbps Self-Calibrating Time Base with ±5%
Tolerance for Serial and 1-Wire
Communication User-Selectable RXD/TXD Polarity
Minimizes Component Count When
Interfacing to 5V Based RS232 Systems or
Directly to UARTs Smart Protocol Combines Data and Control
Information Without Requiring Extra Pins Compatible with Optical, IR, and RF to
RS232 Converters • Single Product Supports Various iButton® or
1-Wire Device Types for Easy System Integration Supports Reading and Writing at Standard
and Overdrive Speeds Provides Strong Pullup to 5V for Temperature
and EEPROM 1-Wire Devices Programs 1-Wire EPROM Devices with
External 12V Power Supply Programmable 1-Wire Timing and Driver
Characteristics Accommodate a Wide Range
of Slave Device Configurations at Standard
Speed Operates Over 4.5V to 5.5V from -40°C to
+85°C
PIN ASSIGNMENT
PIN DESCRIPTION GND - Ground
1-W - 1-Wire Input/Output
NC - No Connection
VDD - 4.5V to 5.5V
VPP - Optional EPROM Programming Voltage
POL - RXD/TXD Polarity Select
TXD - Serial Data from UART
RXD - Serial Data to UART
ORDERING INFORMATION
PART TEMP
RANGE
PIN-
PACKAGE DS2480B+ -40°C to +85°C 8 SO
DS2480B+T&R -40°C to +85°C 8 SO
+ Denotes a lead(Pb)-free/RoHS-compliant package.
T&R = Tape and reel.
DESCRIPTION The DS2480B is a serial port to 1-Wire interface chip that supports standard and overdrive speeds. It con-
nects directly to UARTs and 5V RS232 systems. Interfacing to RS232C (±12V levels) requires a passive
clamping circuit and one 5V to ±12V level translator. Internal timers relieve the host of the burden of
DS2480B
Serial to 1-Wire Line Driver 19-5047; 4/15
GND
1-W
NC
VDD
RXD
TXD
POL
VPP
8-Pin SO (150 mil)
1-Wire and iButton are registered trademarks of
Maxim Integrated Products, Inc.
DS2480B
into eight 1-Wire time slots, thereby increasing the data throughput significantly. In addition, the
DS2480B can be set to communicate at four different data rates, including 115.2kbps, 57.6kbps, and
19.2kbps, with 9.6kbps being the power-on default. Command codes received from the host’s crystal
controlled UART serve as a reference to continuously calibrate the on-chip timing generator. The
DS2480B uses a unique protocol that merges data and control information without requiring control pins.
This approach maintains compatibility to off-the-shelf serial to wireless converters, allowing easy
realization of 1-Wire media jumpers. The various control functions of the DS2480B are optimized for 1-
Wire networks and support the special needs of all current 1-Wire devices including EPROM-based add-
only memories, EEPROM devices, and 1-Wire thermometers. See Application Note 192: Using the
DS2480B Serial 1-Wire Driver for detailed software examples.
DETAILED PIN DESCRIPTION
PIN SYMBOL DESCRIPTION GND
Ground Pin. Common ground reference and ground return for 1-Wire bus 1-W
1-Wire Input/Output Pin. 1-Wire bus with slew-rate-controlled pulldown,
active pullup, ability to switch in VPP to program EPROM, and ability to switch
in VDD through a low-impedance path to program EEPROM, or perform a
temperature conversion. N.C.
No Connection VDD
Power Input Pin. Power supply for the chip and 1-Wire pullup voltage, 5V ±10%, must always be lower than or equal to VPP. VDD should be derived from
VPP by a separate voltage regulator whenever possible. VPP
EPROM Programming Voltage. 12V supply input for EPROM programming. If EPROM programming is not required, connect this pin directly to the system’s
5V supply. POL
RXD/TXD Polarity Select. RXD/TXD polarity select; tied to GND for RS232 (12V or 5V) connection; tied to VDD for direct connection to UART chip. TXD
Serial Data from UART. Data input from host (inverted or true); maximum voltage swing -0.3V to VDD + 0.3V; for logic thresholds see DC specifications. RXD
Serial Data to UART. Signal output to host; push-pull driver with CMOS compatible levels; for true ±12V RS232 systems an external level translator must
be provided.
OVERVIEW The DS2480B directly interfaces a 5V serial communication port with its lines TXD (transmit) and RXD
(receive) to a 1-Wire bus. In addition the device performs a speed conversion allowing the data rate at the
communication port to be different from the 1-Wire data rate. Several parameters relating to the 1-Wire
port and its timing as well as the communication speed at both the port and the 1-Wire bus are
configurable. The circuit to achieve these functions is outlined in the block diagram (see Figure 1).
The device gets its input data from the serial communication port of the host computer through pin TXD.
For compatibility with active-high as well as active-low systems, the incoming signal can be inverted by
means of the polarity input POL. The polarity chosen by hard-wiring the logic level of this pin is also
valid for the output pin RXD. If for minimizing the interface hardware an asymmetry between RXD and
TXD is desired, this can be achieved by setting the most significant bit of the speed control parameter to a
1 (see Configuration Parameter Value Codes). With the MS bit of the speed control set to 1, the polarity
at TXD is still selected by the logic level at POL, but the polarity at RXD will be the opposite of what the
DS2480B
As data enters the core of the DS2480B’s logic circuitry, it is analyzed to separate data and command
bytes and to calibrate the device’s timing generator. The timing generator controls all speed relations of
the communication interface and the 1-Wire bus as well as the waveforms on the 1-Wire bus.
Command bytes either affect the configuration setting or generate certain waveforms on the 1-Wire bus.
Data bytes are simply translated by the protocol converter into the appropriate 1-Wire activities. Each
data byte generates a return byte from the 1-Wire bus that is communicated back to the host through the
RXD pin as soon as the activity on the 1-Wire bus is completed.
The 1-Wire driver shapes the slopes of the 1-Wire waveforms, applies programming pulses or strong
pullup to 5V and reads the 1-Wire bus using a non-TTL threshold to maximize the noise margin for best
performance on large 1-Wire networks.
Figure 1. DS2480B BLOCK DIAGRAM
DEVICE OPERATION The DS2480B can be described as a complex state machine with two static and several dynamic states.
Two device-internal flags as well as functions assigned to certain bit positions in the command codes
determine the behavior of the chip, as shown in the state transition diagram (Figure 2). The DS2480B
requires and generates a communication protocol of 8 data bits per character, 1 stop bit and no parity. It is
permissible to use 2 stop bits on the TXD line. However, the DS2480B only asserts a single stop bit on
RXD.
When powering up, the DS2480B performs a master reset cycle and enters the Command Mode, which is one of the two
static states. The device now expects to receive one 1-Wire reset command on the TXD line sent by the host at a data rate of
9600bps (see Communication Commands section for details). This command byte is required solely for calibration of the baud
rate timing generator the DS2480B and is not translated into any activity on the 1-Wire bus. After this first command byte the
device is ready to receive and execute any command as described later in this document. NOTE: Baud rate calibration is valid
only for the VDD operating voltage at which calibration is performed. Post-calibration changes in VDD by more than 5% may
cause calibration error to exceed ±5%. The DS2480B requires a 1-Wire reset command sent by the host at a data rate of
9600bps for calibration. Data rates of 115200bps or higher during calibration may put the DS2480B in an undefined state,
DS2480B
Figure 2. STATE TRANSITION DIAGRAM
LEGEND: V BINARY VALUE (TYPE OF WRITE TIME SLOT)
SS 1-WIRE SPEED SELECTION CODE IF LOGIC 1, GENERATES STRONG PULLUP TO 5V IMMEDIATELY FOLLOWING THE TIME SLOT TYPE OF PULSE; 0 = STRONG PULLUP (5V), 1 = PROGRAMMING PULSE (12V) 1 = ARM STRONG PULLUP AFTER EVERY BYTE; 0 = DISARM SEARCH ACCELERATOR CONTROL; 1 = ACCELERATOR ON, 0 = ACCELERATOR OFF
ZZZ CONFIGURATION PARAMETER CODE (WRITE), 000 = READ CONFIGURATION PARAMETER
VVV CONFIGURATION PARAMETER VALUE CODE (WRITE), CONFIGURATION PARAMETER CODE (READ) DON’T CARE
DS2480B
A master reset cycle can also be generated by means of software. This may be necessary if the host for
any reason has lost synchronization with the device. The DS2480B will perform a master reset cycle
equivalent to the power-on reset if it detects start polarity in place of the stop bit. The host has several
options to generate this condition. These include making the UART generate a break signal, sending a
NULL character at a data rate of 4800bps and sending any character with parity enabled and selecting
space polarity for the parity bit. As with the power-on reset, the DS2480B requires a 1-Wire reset
command sent by the host at a data rate of 9600bps for calibration.
After the DS2480B has reached the Command Mode, the host can send commands such as 1-Wire Reset,
Pulse, Configuration, Search Accelerator, and Single Bit functions or switch over to the second static
state called Data Mode. In Data Mode the DS2480B simply converts bytes it receives at the TXD pin
into their equivalent 1-Wire waveforms and reports the results back to the host through the RXD pin. If
the Search Accelerator is on, each byte seen at TXD will generate a 12-bit sequence on the 1-Wire bus
(see Search Accelerator section for details). If the strong pullup to 5V is enabled (see Pulse Command),
each byte on the 1-Wire bus will be followed by a pause of predefined duration where the bus is pulled to
5V via a low-impedance transistor in the 1-Wire driver circuit.
While being in the Data Mode the DS2480B checks each byte received from the host for the reserved
code that is used to switch back to Command Mode. To be able to write any possible code (including the
reserved one) to the 1-Wire bus, the transition to the Command Mode is as follows: After having received
the code for switching to Command Mode, the device temporarily enters the Check Mode where it waits
for the next byte. If both bytes are the same, the byte is sent once to the 1-Wire bus and the device returns
to the Data Mode. If the second byte is different from the reserved code, it will be executed as command
and the device finally enters the Command Mode. As a consequence, if the reserved code that normally
switches to Command Mode is to be written to the 1-Wire bus, this code byte must be sent twice
(duplicated). This detail must be considered carefully when developing software drivers for the
DS2480B.
After having completed a memory function with a device on the 1-Wire bus it is recommended to issue a
Reset Pulse. This means that the DS2480B has to be switched to Command Mode. The host then sends
the appropriate command code and continues performing other tasks. If during this time a device arrives
at the 1-Wire bus it will generate a presence pulse. The DS2480B will recognize this unsolicited presence
pulse and notify the host by sending a byte such as XXXXXX01b. The Xs represent undefined bit values.
The fact that the host receives the byte unsolicited together with the pattern 01b in the least significant 2
bits marks the bus arrival. If the DS2480B is left in Data Mode after completing a memory function
command it will not report any bus arrival to the host.
COMMAND CODE OVERVIEW The DS2480B is controlled by a variety of commands. All command codes are 8 bits long. The most
significant bit of each command code distinguishes between communication and configuration
commands. Configuration commands access the configuration registers. They can write or read any of the
configurable parameters. Communication commands use data of the configuration register in order to
generate activity on the 1-Wire bus and/or (dis)arm the strong pullup after every byte or (de)activate the
Search Accelerator without generating activity on the 1-Wire bus. Details on the command codes are
included in the State Transition diagram (Figure 2). A full explanation is given in the subsequent
Communication Commands and Configuration Commands sections.
DS2480B
In addition to the command codes explained in the subsequent sections the DS2480B understands the
following reserved command codes:
E1h switch to Data Mode
E3h switch to Command Mode
F1h pulse termination
Except for these reserved commands, the Search Accelerator control and the first byte after power-on
reset or master reset cycle, every legal command byte generates a response byte. The pulse termination
code triggers the response byte of the terminated pulse command. Illegal command bytes do not generate
a command response byte.
COMMUNICATION COMMANDS The DS2480B supports four communication function commands: Reset, Single Bit, Pulse, and Search
Accelerator control. Details on the assignment of each bit of the command codes are shown in Table 1.
The corresponding command response bytes are detailed in Table 2. The Reset, Search Accelerator
Control and Single Bit commands include bits to select the 1-Wire communication speed (standard,
flexible, Overdrive). Even if a command does not generate activity on the 1-Wire bus, these bits are
latched inside the device and will take effect immediately.
Reset The Reset command must be used to begin all 1-Wire communication. The speed selection included in
the command code immediately takes effect. The response byte includes a code for the reaction on the
1-Wire bus (bits 0 and 1) and a code for the chip revision (bits 2 to 4).
Single Bit The Single Bit command is used to generate a single time slot on the 1-Wire bus at the speed indicated by
bits 2 and 3. The type of the time slot (Write-0 or Write-1) is determined by the logic value of bit 4. A
Read Data time slot is identical to the Write-1 time slot. Bits 0 and 1 of the response byte transmitted by
the DS2480B at the end of the time slot reveal the value found on the 1-Wire bus when reading.
For a time slot without a subsequent strong pullup, bit 1 of the command must be set to 0. For a time slot
immediately followed by a strong pullup bit 1 must be set to 1. As soon as the strong pullup is over, the
device will send a second response byte, code EFh (read 1) or ECh (read 0), depending on the value
found on the 1-Wire bus when reading.
DS2480B
Table 1. COMMUNICATION COMMAND CODES
FUNCTION BIT 7 BIT 6 BIT 5 BIT 4 BIT 3, BIT 2 BIT 1 BIT Single Bit 1 0 0 0 = write 0
1 = write 1
00 reg. speed
01 flex. speed
10 OD. speed
11 reg. speed
See Text 1
Search
Accelerator
Control 0 1
0 = accelerator off
1 = accelerator on
See Text 00 reg. speed
01 flex. speed
10 OD. speed
11 reg. speed 1
Reset 1 1 0 (don’t care)
00 reg. speed
01 flex. speed
10 OD. speed
11 reg. speed 1
Pulse 1 1 1 0 = 5V strong pullup
1 = 12V prog. pulse 11 pulse
See Text 1
Table 2. COMMUNICATION COMMAND RESPONSE
FUNCTION BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Single Bit 1 0 0 same as sent 1-Wire read back,
both bits same value
Reset 1 1
X 0 1 1
00 = 1-Wire shorted
01 = presence pulse
10 = alarming presence
pulse
11 = no presence pulse
Pulse 1 1 1 same as sent undefined
X: This bit is reserved and undefined. In previous data sheet versions this bit was used to indicate that a
programming voltage was present.
Search Accelerator Control The Search Accelerator Control command is used to set or reset the Search Accelerator control flag. Bit 4
of the command code contains the state to which the accelerator control flag is to be set. If the flag is set
to a 1 (on) the device translates every byte received in Data Mode into a 12-bit sequence on the 1-Wire
bus. For details on how the Search Accelerator works please refer to the section Search Accelerator
Operation. Before activating the Search Accelerator, one must make sure that the strong pullup after
every byte is disarmed (see Pulse Command). The Search Accelerator command does not generate a
command response byte.
Although the Search Accelerator Control command itself does not generate any 1-Wire activity, it can be
used to select the communication speed on the 1-Wire bus. The speed selection (if different from the
previous setting, e.g., from a Reset command) will take effect immediately.
Pulse The Pulse command serves several functions that are selected by the contents of bit 1 and bit 4 of the
DS2480B
of the pulse command is arming and disarming a strong pullup after every subsequent byte in Data Mode.
The arm/disarm function is controlled by bit 1 of the command code. Bit 4 determines whether the device
will generate a strong pullup to 5V or a 12V programming pulse. The table below summarizes these
options.
BIT 4 BIT 1 FUNCTION 0 Strong pullup to 5V and disarm 0 12V programming pulse and disarm 1 Strong pullup to 5V and arm 1 12V programming pulse and arm
The strong pullup to 5V is required to program EEPROM devices or to operate special function devices
that require a higher current for a limited time after having received a “go and convert” command.
Therefore, and because it significantly reduces the effective data throughput on the 1-Wire bus, the strong
pullup is disarmed most of the time. Although arming or disarming is simultaneously possible while
generating a programming pulse, this is not recommended since it is likely to destroy the DS2480B if
non-EPROM devices are connected to the 1-Wire bus.
The duration of the strong pullup or programming pulse is determined by configuration parameters and
ranges from a few microseconds up to unlimited (see Configuration Commands section). However,
unlimited duration is not allowed in conjunction with arming the strong pullup after every byte. As long
as the DS2480B is in Command Mode the host may terminate a strong pullup or programming pulse
prematurely at any time by sending the command code F1h.
The response byte is generated as soon as the strong pullup or programming pulse is over (either because
the predefined time has elapsed, the high current demand is over, or due to termination by the host). The
response byte mainly returns the command code as sent by the host, but the 2 least significant bits are
undefined.
If the strong pullup is armed and the device is in Data Mode, the end of the strong pullup will be signaled
as code F6h if the most significant bit of the preceding data byte on the 1-Wire bus is a 1 and 76h
otherwise. The host will see this response byte in addition to the response on the data byte sent (see also
Waveforms section later in this document).
SEARCH ACCELERATOR INTRODUCTION The Search Accelerator is a logic block inside the DS2480B that allows using the Search ROM function
very efficiently under modern operating systems. Without the DS2480B all 1-Wire port adapters have to
involve the computer’s CPU for every single time slot or pulse to be generated on the 1-Wire bus.
Under some operating systems it may take several milliseconds or more to get the first time slot generated
on the 1-Wire bus when sending commands to the UART. Every subsequent time slot will be generated
in much less time, since the computer simply sends out “streams”—a long chain of bytes. This works
reasonably well when reading or writing large blocks of data.
Searching the 1-Wire bus to identify all ROM IDs of the devices connected, however, requires reading 2
bits, making a decision and then writing a bit. This procedure is to be repeated 64 times to identify and
address a single device. With the overhead of modern operating systems this fairly simple process takes a
DS2480B
During the execution of the Search ROM function, the Search Accelerator receives from the host
information on the preferred path to choose as one contiguous chain of bytes and then translates it into the
appropriate time slots on the 1-Wire bus. In addition, the Search Accelerator reports back to the host the
ROM ID of the device actually addressed and the bit positions in which conflicts were found. (If the
ROM ID of one device has a 0 in a bit position where another device has a 1, this is called a “conflict” on
the electrical level and “discrepancy” on the logical level. See Application Note 187 for a more detailed
discussion of the Search ROM.) This helps the host to select the preferred path for the next Search ROM
activity.
Since the ROM ID of all 1-Wire/iButton devices is 64 bits long and a conflict may occur in any of these
bits, the total length of data reported to the host is 128 bits or 16 bytes. To avoid data overrun (if the CPU
sends data faster than it can be processed) the protocol for the Search Accelerator operation was defined
so that one has to send as many bytes as one will receive. This way the CPU sends 16 bytes for each path
and the UART guarantees the correct data timing and frees the CPU for other tasks while the DS2480B
performs a Search ROM function.
SEARCH ACCELERATOR OPERATION After the Search Accelerator is activated and the Data Mode is selected, the host must send 16 bytes to
complete a single Search ROM pass on the 1-Wire bus. These bytes are constructed as follows:
first byte 6 5 4 3 2 1 0
r3 x3 r2 x2 r1 x1 r0 x0
et cetera th byte 6 5 4 3 2 1 0
r63 x63 r62 x62 r61 x61 r60 x60
In this scheme, the index (values from 0 to 63, “n”) designates the position of the bit in the ROM ID of a
1-Wire/iButton device. The character “x” marks bits that act as filler and do not require a specific value
(“don’t care” bits). The character “r” marks the path to go at that particular bit in case of a conflict during
the execution of the ROM Search.
For each bit position n (values from 0 to 63) the DS2480B will generate three time slots on the 1-Wire
bus. These are referenced as:
b0 for the first time slot (Read Data)
b1 for the second time slot (Read Data) and
b2 for the third time slot (Write Data).
DS2480B
The type of time slot b2 (write 1 or write 0) is determined by the DS2480B as follows:
b2 = rn if conflict (as chosen by the host)
= b0 if no conflict (there is no alternative)
= 1 if error (there is no response)
The response the host will receive during a complete pass through a Search ROM function using the
Search Accelerator consists of 16 bytes as follows:
first byte 6 5 4 3 2 1 0
r’3 d3 r’2 d2 r’1 d1 r’0 d0
et cetera th byte 6 5 4 3 2 1 0
r’63 d63 r’62 d62 r’61 d61 r’60 d60
As before, the index (values from 0 to 63, “n”) designates the position of the bit in the ROM ID of a
1-Wire/iButton device. The character “d” marks the discrepancy flag in that particular bit position. The
discrepancy flag will be 1 if there is a conflict, or no response in that particular bit position, and 0
otherwise. The character “r” marks the actually chosen path at that particular bit position. The chosen
path is identical to b2 for the particular bit position of the ROM ID.
To perform a Search ROM sequence one starts with all bits rn being 0s. In case of a bus error, all
subsequent response bits r’n are 1s until the Search Accelerator is deactivated. Thus, if r’63 and d63 are both
1, an error has occurred during the search procedure and the last sequence has to be repeated. Otherwise
r’n (n = 0 ... 63) is the ROM code of the device that has been found and addressed.
For the next Search ROM sequence one reuses the previous set rn (n = 0 ... 63) but sets rm to 1 with “m”
being the index number of the highest discrepancy flag (that is, 1) and sets all ri to 0 with i > m. This
process is repeated until the highest discrepancy occurs in the same bit position for two consecutive
passes.
The table below shows an example for the communication between host and DS2480B to perform one
pass through the Search ROM function using the Search Accelerator. After a device has been identified
and addressed, a memory function (not specified here) is executed and finally a reset pulse is generated.
This example assumes that the DS2480B was in Command Mode and that standard 1-Wire speed is used.
DS2480B
Search Accelerator Usage Example
Action Sequence Host TX Host RX
Generate Reset Pulse C1 CD or ED
Set Data Mode E1 (nothing) Search ROM command F0 (as sent)
Set Command Mode E3 (nothing)
Search Accelerator On B1 (nothing)
Set Data Mode E1 (nothing) Send 16 bytes data (response)
Set Command Mode E3 (nothing)
Search Accelerator Off A1 (nothing)
Set Data Mode E1 (nothing) Do Memory Function
Set Command Mode E3 (nothing)
Generate Reset Pulse C1 CD or ED
CONFIGURATION COMMANDS The DS2480B is designed to be configurable for the varying requirements of its application. When the
device powers up and/or performs a master reset cycle, the hard-wired default configuration settings take
effect. These settings will work on a short 1-Wire bus and assume standard 1-Wire communication speed.
To change these default settings and to verify the current settings, the logic of the DS2480B supports
configuration commands. A summary of the available configuration parameters, their default settings at
standard and Overdrive speed and their applicability is shown in Table 3.
Parameters not related to the communication speed on the 1-Wire bus specify the duration of the 12V
programming pulse, the duration of the strong pullup to 5V, and the baud rate on the interface that
connects the DS2480B to the host. The remaining three parameters are used to modify the 1-Wire
communication waveforms if one selects “Flexible Speed” (see Communication Commands for speed
selection).
Flexible speed is implemented to improve the performance of large 1-Wire Networks. This is
accomplished by: limiting the slew rate on falling edges (e. g., at the beginning of time slots, to reduce ringing), extending the Write-1 low time (allows the current flow through the network to end slowly, to prevent
voltage spikes from inductive kickback), delaying the time point when reading a bit from the 1-Wire bus (gives the network more time to
stabilize, to get a higher voltage margin) and adding extra recovery time between Write-0 time slots (allows more energy transfer through the
network, to replenish the parasite power supply of the devices on the bus).
The latter two functions are controlled by a single parameter. Taking advantage of flexible speed requires
changing one or more of these parameters from their default values. Otherwise the waveforms will be
identical to those at standard speed.
Each configuration parameter is identified by its 3-bit parameter code and can be programmed for one of
a maximum eight different values using a 3-bit value code. A matrix of parameter codes and value codes
DS2480B
Table 3. CONFIGURATION PARAMETER OVERVIEW
Parameter
Description Configurable at Default
Par. Code Standard Flexible Overdrive Reg./Flex. Overdrive Pulldown Slew Rate
Control 001 √ 15V/μs 15V/μs
Programming Pulse
Duration 010 √ √ √ 512μs 512μs
Strong Pullup Duration 011 √ √ √ 524ms 524ms
Write-1 Low Time 100 √ 8μs 1μs
Data Sample Offset and
Write 0 Recovery Time 101 √ 3μs
3μs
1μs
3μs
RS232 Baud Rate 111 √ √ √ 9.6kbps 9.6kbps
The numbers given for parameter 001 (Pulldown Slew Rate Control) are nominal values. They may vary
to some extent and are almost independent of the load on the 1-Wire bus. Information on how to select
the optimum value of this parameter is given in the Controlled Edges section .
For the parameters 010 (Programming Pulse Duration) and 011 (Strong Pullup Duration) one may select
indefinite duration. This value, however, should only be selected if one is not going to switch the device
to Data Mode. As long as the device stays in Command Mode, any pulse function (programming or
strong pullup) that uses one of these parameters can be terminated by sending the command code F1h.
Termination is not possible if the device is in Data Mode.
Parameter 111 (RS232 Baud Rate) has two functions. It selects the baud rate and allows inversion of the
signal at the RXD pin. Using one of the value codes 100 to 111 will set the polarity at RXD to the
opposite of what is defined by the logic level at the POL pin (asymmetry bit, see Figure 1). This may
reduce the component count in some applications of the device. Note that when changing the baud rate,
the DS2480B will send the command response byte at the new data rate.
A short explanation on the use of parameters 100 (Write-1 Low Time) and 101 (Data Sample
Offset/Write-0 Recovery Time) is given in the Timing Diagrams section later in this document.
DS2480B
Table 4. CONFIGURATION PARAMETER VALUE CODES Value Codes
Parameter Code 000 001 010 011 100 101 110 111 Unit
001 (PDSRC) 15 2.2 1.65 1.37 1.1 0.83 0.7 0.55 V/μs
010 (PPD) 32 64 128 256 512 1024 2048 ∞ μs
011 (SPUD) 16.4 65.5 131 262 524 1048 Note ∞ ms
100 (W1LT) 8 9 10 11 12 13 14 15 μs
101 (DSO/W0RT) 3 4 5 6 7 8 9 10 μs
110 (LOAD) 1.8 2.1 2.4 2.7 3.0 3.3 3.6 3.9 mA
111 (RBR) 9.6 19.2 57.6 115.2 9.6 19.2 57.6 115.2 kbps
Note: The value code 110 of parameter 011 (Strong Pullup Duration) must not be used since it could
cause unexpected results.
The syntax of configuration commands is very simple. Each 8-bit code word contains a 3-bit parameter
code to specify the parameter and the 3-bit value code to be selected. Bit 7 of the command code is set to
0 and bit 0 is always a 1. To read the value code of a parameter, one writes all 0s for the parameter code
and puts the parameter code in place of the parameter value code. Table 5 shows the details.
The configuration command response byte is similar to the command byte itself. Bit 0 of the response
byte is always 0. When writing a parameter, the upper 7 bits are the echo of the command code. When
reading a parameter, the current value code is returned in bit positions 1 to 3 with the upper 4 bits being
the same as sent (see Table 6).
Table 5. CONFIGURATION COMMAND CODES
FUNCTION BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Write Parameter 0 parameter code parameter value code 1
Read Parameter 0 0 0 0 parameter code 1
Table 6. CONFIGURATION COMMAND RESPONSE BYTE
FUNCTION BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Write Parameter 0 same as sent same as sent 0
Read Parameter 0 same as sent parameter value code 0
DS2480B
CONTROLLED EDGES One of the tasks of the DS2480B is to actively shape the edges of the 1-Wire communication waveforms.
This speeds up the recharging of the 1-Wire bus (rising edges) and reduces ringing of long lines (falling
edges). The circuitry for shaping rising edges is always on. The slew rate of falling edges is actively
controlled only at flexible speed and requires the parameter for slew rate control being different from its
power-on default value.
All Rising Edges The active pullup of the rising edges reduces the rise time on the 1-Wire bus significantly compared to a
simple resistive pullup. Figure 4 shows how the DS2480B is involved in shaping a rising edge.
Figure 4. ACTIVE PULLUP The circuit operates as follows: At t1 the pulldown (induced by the DS2480B or a device on the bus) ends.
From this point on the 1-Wire bus is pulled high by the weak pullup current IWEAKPU provided by the
DS2480B. The slope is determined by the load on the bus and the value of the pullup current. At t2 the
voltage crosses the threshold voltage VIAPO. Now the DS2480B switches over from the weak pullup
current IWEAKPU to the higher current IACTPU. As a consequence, the voltage on the bus now rises faster. As
the voltage on the bus crosses the threshold VIAPTO at t3, a timer is started. As long as this timer is on
(tAPUOT), the IACTPU current will continue to flow. After the timer is expired, the DS2480B will switch
back to the weak pullup current. Excessive noise on the 1-Wire line at the VIAPTO level can cause an
undesirable trip of the active pullup. External R-C filtering as discussed in the HARDWARE
APPLICATION EXAMPLES section and Application Note 148 should be used to prevent false triggering.
DS2480B
Falling Edges (DS2480B-initiated) Whenever the DS2480B begins pulling the 1-Wire bus low to initiate a time slot, for example, it first
turns off the weak pullup current IWEAKPU. Then, at standard and Overdrive speeds it will generate a
falling edge at a slew rate of typically 15V/µs. This value is acceptable for short 1-Wire busses and
adequate for communication at Overdrive speed. For 1-Wire networks of more than roughly 30m length
one should always use flexible speed. One of the parameters that is adjustable at flexible speed is the slew
rate of DS2480B-initiated falling edges. The effect of the slew rate control is shown in Figure 5.
Figure 5. SLEW RATE CONTROL As extensive tests have shown, 1-Wire networks at a length of up to 300m will perform best if the fall
time tF is in the range of 4 ± 0.5µs. This translates into a slew rate of approximately 1V/µs. This slew rate
is typically achieved by setting the configuration parameter 001 (Pulldown Slew Rate Control) to a value
of 100 (see Table 4). If the actual measured fall time is longer than the target value, one should use a
value code of 011 or lower. If the fall time is shorter, one should use a value code of 101 or higher.
Once determined, the value code for the Pulldown Slew Rate Control parameter should be stored in the
host and always be loaded into the DS2480B after a power-on or master reset cycle.
TIMING DIAGRAMS This section explains the waveforms generated by the DS2480B on the 1-Wire bus in detail. First the
communication waveforms such as the Reset/Presence Detect Sequence and the time slots are discussed.
After that follows a detailed description of the pulse function under various conditions.
DS2480B
1-WIRE COMMUNICATION WAVEFORMS One of the major features of the DS2480B is that it relieves the host from generating the timing of the
1-Wire signals and sampling the 1-Wire bus at the appropriate times. How this is done for the
reset/presence detect sequence is shown in Figure 6a. This sequence is composed of four timing
segments: the reset low time tRSTL, the short/interrupt sampling offset tSI, the presence detect sampling
offset tPDT and a delay time tFILL. The timing segments tSI, tPDT and tFILL comprise the reset high time tRSTH
where 1-Wire slave devices assert their presence or interrupt pulse. During this time the DS2480B pulls
the 1-Wire bus high with its weak pullup current.
The values of all timing segments for all 1-Wire speed options are shown in the table. Since the
reset/presence sequence is slow compared to the time slots, the values for standard and flexible speed are
the same. Except for the falling edge of the presence pulse all edges are controlled by the DS2480B. The
shape of the uncontrolled falling edge is determined by the capacitance of the 1-Wire bus and the number,
speed and sink capability of the slave devices connected.
Figure 6a. RESET/PRESENCE DETECT
Speed tRSTL tSI tPDT tFILL tRSTH Standard 512μs 8μs 64μs 512μs 584μs
Overdrive 64μs 2μs 8μs 64μs 74μs
Flexible 512μs 8μs 64μs 512μs 584μs
After having received the command code for generating a reset/presence sequence, the DS2480B pulls
the 1-Wire bus low for tRSTL and then lets it go back to 5V. The DS2480B will now wait for the
short/interrupt sampling offset tSI to expire and then test the voltage on the 1-Wire bus to determine if
there is a short or an interrupt signal. If there is no short or interrupt (as shown in the picture), the
DS2480B will wait for tPDT and test the voltage on the 1-Wire bus for a presence pulse. Regardless of the
result of the presence test, the DS2480B will then wait for tFILL to expire and then send the command
response byte to the host.
If the test for interrupt or short reveals a logic 0, the DS2480B will wait for 4096µs and then test the
1-Wire bus again. If a logic 0 is detected, the 1-Wire bus is shorted and a command response byte with
the code for SHORT will be sent immediately. If a logic 1 is detected, the device will wait for tFILL to
expire, after which it will send the command response byte with the code for an alarming presence pulse.
No additional testing for a presence pulse will be done. The DS2480B will perform the short/interrupt
testing as described also at Overdrive speed, although interrupt signaling is only defined for standard
speed.
The idle time following the Reset/Presence Detect sequence depends on the serial communication speed
