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DS1345WP-150 |DS1345WP150DALLASN/a33avai3.3V 1024k Nonvolatile SRAM with Battery Monitor
DS1345WP-150 |DS1345WP150MAXN/a16avai3.3V 1024k Nonvolatile SRAM with Battery Monitor
DS1345WP-150 |DS1345WP150DALLSN/a16avai3.3V 1024k Nonvolatile SRAM with Battery Monitor


DS1345WP-150 ,3.3V 1024k Nonvolatile SRAM with Battery MonitorDS1345W3.3V 1024k Nonvolatile SRAMwith Battery Monitor
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DS1345WP-150
3.3V 1024k Nonvolatile SRAM with Battery Monitor
FEATURES10 years minimum data retention in the
absence of external powerData is automatically protected during powerlossPower supply monitor resets processor when
VCC power loss occurs and holds processor in
reset during VCC ramp-upBattery monitor checks remaining capacitydailyRead and write access times as fast as 100 nsUnlimited write cycle enduranceTypical standby current 50 µAUpgrade for 128k x 8 SRAM, EEPROM orFlashLithium battery is electrically disconnected to
retain freshness until power is applied for the
first timeOptional industrial temperature range of-40°C to +85°C, designated INDPowerCap Module (PCM) packageDirectly surface-mountable moduleReplaceable snap-on PowerCap provides
lithium backup battery- Standardized pinout for all nonvolatile
SRAM productsDetachment feature on PowerCap allows
easy removal using a regular screwdriver
PIN ASSIGNMENT
PIN DESCRIPTION

A0-A16- Address Inputs
DQ0-DQ7- Data In/Data Out- Chip Enable- Write Enable- Output Enable
RST- Reset Output- Battery Warning Output
VCC- Power (+3.3 Volts)
GND- Ground- No Connect
DESCRIPTION
The DS1345W 3.3V 1024k Nonvolatile SRAM is a 1,048,576-bit, fully static, nonvolatile SRAM
organized as 131,072 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and
control circuitry, which constantly monitors VCC for an out-of-tolerance condition. When such a condition
occurs, the lithium energy source is automatically switched on and write protection is unconditionally
enabled to prevent data corruption. Additionally, the DS1345W has dedicated circuitry for monitoring thestatus of VCC and the status of the internal lithium battery. DS1345W devices in the PowerCap Module
package are directly surface mountable and are normally paired with a DS9034PC PowerCap to form a
complete Nonvolatile SRAM module. The devices can be used in place of 128k x 8 SRAM, EEPROM or
Flash components.
DS1345W
3.3V 1024k Nonvolatile SRAM

A15
A16
RST
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
GND
34-Pin PowerCap Module (PCM)
(Uses DS9034PC PowerCap)
DS1345W
READ MODE

The DS1345W executes a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip
Enable) and OE (Output Enable) are active (low). The unique address specified by the 17 address inputs(A0 - A16) defines which of the 131,072 bytes of data is to be accessed. Valid data will be available to the
eight data output drivers within tACC(Access Time) after the last address input signal is stable, providing
that CE and OE (Output Enable) access times are also satisfied. If OE and CE access times are not
satisfied, then data access must be measured from the later occurring signal (CE or OE) and the limiting
parameter is either tCO for CE or tOE for OE rather than address access.
WRITE MODE

The DS1345W executes a write cycle whenever the WE and CE signals are in the active (low) state after
address inputs are stable. The later occurring falling edge of CE or WE will determine the start of the
write cycle. The write cycle is terminated by the earlier rising edge of CE or WE. All address inputs must
be kept valid throughout the write cycle. WE must return to the high state for a minimum recovery time
(tWR) before another cycle can be initiated. The OE control signal should be kept inactive (high) during
write cycles to avoid bus contention. However, if the output drivers are enabled (CE and OE active) then will disable the outputs in tODW from its falling edge.
DATA RETENTION MODE

The DS1345W provides full functional capability for VCC greater than 3.0 volts and write protects by 2.8
volts. Data is maintained in the absence of VCC without any additional support circuitry. The nonvolatilestatic RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs automatically
write protect themselves, all inputs become “don’t care,” and all outputs become high impedance. As VCC
falls below approximately 2.5 volts, the power switching circuit connects the lithium energy source to
RAM to retain data. During power-up, when VCC rises above approximately 2.5 volts, the power
switching circuit connects external VCC to the RAM and disconnects the lithium energy source. NormalRAM operation can resume after VCC exceeds 3.0 volts.
SYSTEM POWER MONITORING

The DS1345W has the ability to monitor the external VCC power supply. When an out-of-tolerance power
supply condition is detected, the NV SRAM warns a processor-based system of impending power failure
by asserting RST. On power up, RST is held active for 200ms nominal to prevent system operation
during power-on transients and to allow tREC to elapse. RST has an open-drain output driver.
BATTERY MONITORING

The DS1345W automatically performs periodic battery voltage monitoring on a 24-hour time interval.Such monitoring begins within tREC after VCC rises above VTP and is suspended when power failure
occurs.
After each 24-hour period has elapsed, the battery is connected to an internal 1MΩ test resistor for 1
second. During this 1 second, if battery voltage falls below the battery voltage trip point (2.6V), the
battery warning output BW is asserted. Once asserted, BW remains active until the module is replaced.
The battery is still retested after each VCC power-up, however, even if BW is active. If the battery voltage
is found to be higher than 2.6V during such testing, BW is de-asserted and regular 24-hour testing
resumes. BW has an open-drain output driver.
DS1345W
FRESHNESS SEAL

Each DS1345W is shipped from Dallas Semiconductor with its lithium energy source disconnected,
guaranteeing full energy capacity. When VCC is first applied at a level greater than VTP, the lithium
energy source is enabled for battery backup operation.
PACKAGES

The 34-pin PowerCap Module integrates SRAM memory and nonvolatile control into a module base
along with contacts for connection to the lithium battery in the DS9034PC PowerCap. The PowerCapModule package design allows a DS1345W device to be surface mounted without subjecting its lithium
backup battery to destructive high-temperature reflow soldering. After a DS1345W is reflow soldered, a
DS9034PC is snapped on top of the PCM to form a complete Nonvolatile SRAM module. The
DS9034PC is keyed to prevent improper attachment. DS1345W module bases and DS9034PC
PowerCaps are ordered separately and shipped in separate containers. See the DS9034PC data sheet forfurther information.
DS1345W
ABSOLUTE MAXIMUM RATINGS*

Voltage On Any Pin Relative To Ground -0.3V to +4.6V
Operating Temperature 0°C to 70°C, -40°C to +85°C for IND parts
Storage Temperature -40°C to +70°C, -40°C to +85°C for IND parts
Soldering Temperature260°C for 10 secondsThis is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
(TA: See Note 10)
DC ELECTRICAL CHARACTERISTICS (TA: See Note 10) (VCC = 3.3V
�0.3V)
CAPACITANCE
(TA = 25°C)
DS1345W
AC ELECTRICAL CHARACTERISTICS
(TA: See Note 10) (VCC =3.3V �0.3V)
READ CYCLE

SEE NOTE 1
DS1345W
WRITE CYCLE 1

SEE NOTES 2, 3, 4, 6, 7, 8 AND 12
WRITE CYCLE 2

SEE NOTES 2, 3, 4, 6, 7, 8 AND 13
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