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DS1314DALLASN/a106avai3V Nonvolatile Controller with Lithium Battery Monitor


DS1314 ,3V Nonvolatile Controller with Lithium Battery MonitorFEATURES PIN ASSIGNMENT Converts CMOS SRAM into nonvolatilememory V 1 8 V V 1 8 VCCO CCI CCO CCIV ..
DS1314E+ ,3V Nonvolatile Controller with Lithium Battery MonitorFEATURES PIN ASSIGNMENT Converts CMOS SRAM into nonvolatilememory V 1 8 V V 1 8 VCCO CCI CCO CCIV ..
DS1314S ,3V Nonvolatile Controller with Lithium Battery MonitorFEATURES PIN ASSIGNMENT Converts CMOS SRAM into nonvolatilememory V 1 8 V V 1 8 VCCO CCI CCO CCIV ..
DS1314S ,3V Nonvolatile Controller with Lithium Battery MonitorDS13143V Nonvolatile Controller with LithiumBattery Monitorwww.dalsemi.com
DS1314S+ ,3V Nonvolatile Controller with Lithium Battery MonitorFEATURES PIN ASSIGNMENT Converts CMOS SRAM into nonvolatilememory V 1 8 V V 1 8 VCCO CCI CCO CCIV ..
DS1314S+ ,3V Nonvolatile Controller with Lithium Battery MonitorDS13143V Nonvolatile Controller with LithiumBattery Monitorwww.dalsemi.com
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DTC124EE TL , NPN 100mA 50V Digital Transistors
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DS1314
3V Nonvolatile Controller with Lithium Battery Monitor
FEATURESConverts CMOS SRAM into nonvolatile
memoryUnconditionally write-protects SRAM whenVCC is out of toleranceAutomatically switches to battery backup
supply when VCC power failure occursMonitors voltage of a lithium cell and
provides advanced warning of impendingbattery failureSignals low-battery condition on active low
Battery Warning output signalAutomatic VCC power-fail detection for 3.0V
or 3.3V power suppliesSpace-saving 8-pin DIP and SOIC packagesOptional 16-pin SOIC and 20-pin TSSOP
versions reset processor when power failure
occurs and hold processor in reset during
system power-upIndustrial temperature range of -40°C to
+85°C
PIN ASSIGNMENT
PIN DESCRIPTION

VCCI- Power Supply Input
VCCO- SRAM Power Supply OutputVBAT- Backup Battery Input
CEI- Chip Enable Input
CEO- Chip Enable Output
TOL- VCC Tolerance Select- Battery Warning Output
(Open Drain)
RST- Reset Output (Open Drain)
GND- Ground- No Connection
DESCRIPTION

The DS1314 Nonvolatile Controller with Battery Monitor is a CMOS circuit which solves the application
problem of converting CMOS RAM into nonvolatile memory. Incoming power is monitored for an out-
of-tolerance condition. When such a condition is detected, chip enable is inhibited to accomplish write
protection and the battery is switched on to supply the RAM with uninterrupted power. Special circuitry
uses a low-leakage CMOS process which affords precise voltage detection at extremely low battery
DS1314
3V Nonvolatile Controller with Lithium
Battery Monitor

VCCI
RST
CEO
CEI
VCCO
VBAT
TOL
GND
DS1314E 20-Pin TSSOPGND
TOL
VBAT
VCCOVCCI
CEO
CEI
DS1314S-2 8-Pin SOIC
(150-mil)GND
TOL
VBAT
VCCOVCCI
CEO
CEI
DS1314 8-Pin DIP
(300-mil)
VCCO
VBAT
TOL
GND
VCCI
RST
CEO
CEI
DS1314S 16-Pin SOIC(300-mil)
DS1314
In addition to battery-backup support, the DS1314 performs the important function of monitoring the
remaining capacity of the lithium battery and providing a warning before the battery reaches end-of-life.
Because the open-circuit voltage of a lithium backup battery remains relatively constant over the majority
of its life, accurate battery monitoring requires loaded-battery voltage measurement. The DS1314performs such measurement by periodically comparing the voltage of the battery as it supports an internal
resistive load with a carefully selected reference voltage. If the battery voltage falls below the reference
voltage under such conditions, the battery will soon reach end-of-life. As a result, the Battery Warning
pin is activated to signal the need for battery replacement.
MEMORY BACKUP

The DS1314 performs all the circuit functions required to provide battery-backup for an SRAM. First, thedevice provides a switch to direct power from the battery or the system power supply (VCCI). Whenever
VCCI is less than the switch point VSW and VCCI is less than the battery voltage VBAT, the battery is
switched in to provide backup power to the SRAM. This switch has voltage drop of less than 0.2 volts.
Second, the DS1314 handles power failure detection and SRAM write protection. VCCI is constantlymonitored, and when the supply goes out of tolerance, a precision comparator detects power failure and
inhibits chip enable output (CEO) in order to write-protect the SRAM. This is accomplished by holding
CEO to within 0.2 volts of VCCO when VCCI is out of tolerance. If CEI is (active) low at the time that
power failure is detected, the CEO signal is kept low until CEI is brought high again. Once CEI is
brought high, CEO is taken high and held high until after VCCI has returned to its nominal voltage level. If
CEI is not brought high by 1.5 μs after power failure is detected, CEO is forced high at that time. This
specific scheme for delaying write protection for up to 1.5 μs guarantees that any memory access in
progress when power failure occurs will complete properly. Power failure detection occurs at 3.0V
nominal (3.3V supply) when the TOL pin is wired to GND or at 2.7V nominal (3.0V supply) when TOLis connected to VCCO.
BATTERY VOLTAGE MONITORING

The DS1314 automatically performs periodic battery voltage monitoring at a factory-programmed time
interval of 24 hours. Such monitoring begins within tREC after VCCI rises above VCCTP, and is suspended
when power failure occurs.
After each 24-hour period (tBTCN) has elapsed, the DS1314 connects VBAT to an internal 1.2 MΩ=test
resistor (RINT) for one second (tBTPW). During this one second, if VBAT falls below the factory-
programmed battery voltage trip point (VBTP), the battery warning output BW is asserted. While BW is
active battery testing will be performed with period tBTCW to detect battery removal and replacement.
Once asserted, BW remains active until the battery is physically removed and replaced by a fresh cell.
The battery is still re-tested after each VCC power-up, however, even if BW was active on power-down. If
the battery is found to be higher than VBTP during such testing, BW is deasserted and regular 24-hour
testing resumes. BW has an open-drain output driver.
Battery replacement following BW activation is normally done with VCCI nominal so that SRAM data isnot lost. During battery replacement, the minimum time duration between old battery detachment and
new battery attachment (tBDBA) must be met or BW will not deactivate following attachment of the new
DS1314
NOTE: The DS1314 cannot constantly monitor an attached battery
because such monitoring would
drastically reduce the life of the battery. As a result, the DS1314 only tests the battery for one second out
of every 24 hours and does not monitor the battery in any way between tests. If a good battery (one that
has not been previously flagged with BW) is removed between battery tests, the DS1314 may not
immediately sense the removal and may not activate BW until the next scheduled battery test. If a battery
is then reattached to the DS1314, the battery may not be tested until the next scheduled test.
NOTE: Battery monitoring is only a useful technique when testing can be done regularly over the entire

life of a lithium battery. Because the DS1314 only performs battery monitoring when VCC is nominal,
systems which are powered-down for excessively long periods can completely drain their lithium cells
without receiving any advanced warning. To prevent such an occurrence, systems using the DS1314
battery monitoring feature should be powered-up periodically (at least once every few months) in order to
perform battery testing. Furthermore, anytime BW is activated on the first battery test after a power-up,
data integrity should be checked via checksum or other technique.
POWER MONITORING

DS1314S and DS1314E varieties have an additional reset pin. These varieties detect out-of-tolerance
power supply conditions and warn a processor-based system of impending power failure. When VCCI falls
below the trip point level defined by the TOL pin (VCCTP), the VCCI comparator activates the reset signal
RST. Reset occurs at 3.0V nominal (3.3V supply) when the TOL pin is connected to GND or at 2.7Vnominal (3.0V supply) when TOL is connected to VCCO.
RST also serves as a power-on reset during power-up. After VCCI exceeds VCCTP, RST will be held active
for 200 ms nominal (tRPU). This reset period is sufficiently long to prevent system operation during
power-on transients and to allow tREC to expire. RST has an open-drain output driver.
FRESHNESS SEAL MODE

When the battery is first attached to the DS1314 without VCC power applied, the device does notimmediately provide battery-backup power on VCCO. Only after VCCI exceeds VCCTP and later falls below
both VSW and VBAT will the DS1314 leave Freshness Seal Mode and provide battery-backup power. This
mode allows a battery to be attached during manufacturing but not used until after the system has been
activated for the first time. As a result, no battery energy is drained during storage and shipping.
DS1314
FUNCTIONAL BLOCK DIAGRAM Figure 1
DS1314
ABSOLUTE MAXIMUM RATINGS*

Voltage on Any Pin Relative to Ground-0.5V to +7.0V
Operating Temperature-40°C to +85°C
Storage Temperature-55°C to +125°C
Soldering Temperature260°C for 10 secondsThis is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
(-40°C to +85°C)
DC ELECTRICAL CHARACTERISTICS
(-40°C to +85°C; VCCI = ≥VCCTP)
DC ELECTRICAL CHARACTERISTICS
(-40°C to +85°C; VCCI < VBAT; VCCI < VSW)
DS1314
CAPACITANCE
(tA =25°C)
AC ELECTRICAL CHARACTERISTICS
(-40°C to +85°C; VCCI ≥ VCCTP)
AC ELECTRICAL CHARACTERISTICS
(-40°C to +85°C; VCCI < VCCTP)
AC ELECTRICAL CHARACTERISTICS
(-40°C to +85°C; VCCI ≥ VCCTP)
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