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DS1135LU-10 |DS1135LU10DALLASN/a12774avai3V 3-in-1 High-Speed Silicon Delay Line


DS1135LU-10 ,3V 3-in-1 High-Speed Silicon Delay LineFEATURES PIN ASSIGNMENT All-silicon timing circuit Three independent buffered delays Stable and ..
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DS1135LU-10
3V 3-in-1 High-Speed Silicon Delay Line
FEATURESAll-silicon timing circuitThree independent buffered delaysStable and precise over temperature and
voltageLeading and trailing edge precision preserves
the input symmetryStandard 8-pin SO
(150mil), and 8-Pin µSOP (118mil)Vapor phase and IR reflow solderableAvailable in Tape and ReelDelays specified over both commercial andindustrial temperature ranges3V operationRecommended replacement for DS1033
PIN ASSIGNMENT
PIN DESCRIPTION

IN1-IN3 - Input SignalsOUT1-OUT3 - Output Signals
VCC- +3V Supply
GND - Ground
DESCRIPTION

The DS1135L series is a low-power, 3V high-speed version of the popular DS1013, DS1033, DS1035series.
The DS1135L series of delay lines have three independent logic buffered delays in a single package. The
device is Dallas Semiconductor’s fastest 3-in-1 delay line. It is available in a standard 8-pin 118mil
µSOP and 150mil 8-pin Mini-SO.
The device features precise leading and trailing edge accuracy. It has the inherent reliability of an all-
silicon delay line solution.
Standard delay values are indicated in Table 1. Customers may contact Dallas Semiconductor at (972)371-4348 for further information on custom delay values.
DS1135L
3V 3-in-1 High-Speed
Silicon Delay Line

DS1135LZ 8-Pin SO (150mil)
DS1135LU 8-Pin µSOP (118mil)
See Mech. Drawings Section
IN2
GND
IN3
IN1VCC
OUT1
OUT2
OUT3
DS1135-L
LOGIC DIAGRAM Figure 1
PART NUMBER DELAY TABLE (tPLH , tPHL ) Table 1
NOTES:

1. Nominal conditions are +25°C and VCC = +3.3V.
2. Voltage range of 2.7V to 3.6V.
3. Delay accuracies is for both leading and trailing edges.
4. X in Part number denotes package: U indicates µSOP, Z indicates SO.
TEST SETUP DESCRIPTION

Figure 2 illustrates the hardware configuration used for measuring the timing parameters of the DS1135L.The input waveform is produced by a precision pulse generator under software control. Time delays are
measured by a time interval counter (20 ps resolution) connected to the output. The DS1135L output taps
are selected and connected to the interval counter by a VHF switch control unit. All measurements are
fully automated with each instrument controlled by the computer over an IEEE 488 bus.
ONE OF THREE
DS1135-L
DS1135L TEST CIRCUIT Figure 2

START
50�
50�
DS1135-L
ABSOLUTE MAXIMUM RATINGS*

Voltage on Any Pin Relative to Ground-1.0V to +6.0 VOperating Temperature-40°C to +85°C
Storage Temperature-55�C to +125�C
Soldering Temperature See J-STD-020A specification
Short Circuit Output Current 50mA for 1 second
* This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect reliability.
DC ELECTRICAL CHARACTERISTICS (-40�C to +85�C;VCC=2.7-3.6V)
AC ELECTRICAL CHARACTERISTICS
(-40�C to +85�C;VCC=2.7-3.6V)
CAPACITANCE
(TA=25�C)
DS1135-L
TEST CONDITIONS

Ambient Temperature: 25�C ��3�C
Supply Voltage (VCC ): 3.3V ��0.1V
Input Pulse:
High: 3.0V ��0.1V
Low: 0.0V ��0.1V
Source Impedance: 50��Max.
Rise and Fall Time: 3.0ns Max. — Measured between 0.6V and 2.4V.
Pulse Width: 500ns
Pulse Period: 1�s
Output Load Capacitance: 15pF
Output:Each output is loaded with the equivalent of one 74F04 input gate.
Data is measured at the 1.5V level on the rising and falling edges.
Note: The above
conditions are for test only and do not restrict the devices under other data sheet
conditions.
TIMING DIAGRAM
NOTES:
1. All voltages are referenced to ground.
2. Power-up time is the time from the application of power to the time stable delays are being produced
at the output.
tFALL
80%
tRISE
20%
OUT
1.5V1.5V1.5V1.5V
tPLHtPHL
tOFtOR
DS1135-L
TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading
edge of thefollowing pulse.
tWI (Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the

1.5V point on the trailing edge or the 1.5V point on the trailing edge and the 1.5V point on the leading
edge.
tRISE (Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the

input pulse.
tFALL (Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge on the
input pulse.
tPLH
(Time Delay, Rising): The elapsed time between the 1.5V point on the leading edge of the input
pulse and the 1.5V point on the leading edge of the output pulse.
tPHL
(Time Delay, Falling): The elapsed time between the 1.5V point on the falling edge of the input
pulse and the 1.5V point on the falling edge of the output pulse.
ORDERING INFORMATION
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