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DP8480AJ-DP8480AN
DP8480A 10k ECL to TTL Level Translator with Latch
TL/F/5861
DP8480A
10k
ECL
TTL
Level
Translator
with
Latch
April 1990
DP8480A 10k ECL to TTL Level Translator with Latch
General Description
This circuit translates ECL input levelsto TTL output levels
and providesa fall-through latch.The TRI-STATEÉ outputs
are designedto drive standard50pF loads.The strobeand
chip select inputs operateat ECL levels.
Features 16-pinDIP TRI-STATE outputs ECL control inputs8ns typical propagation delay with50pF load Outputs are TRI-STATE during power up/downfor
glitch free operation 10k ECL input compatible
Logic and Connection Diagram
Dual-In-Line Package
TL/F/5861–1
Top View
Truth Table STR CS L L L L HL Hi-Z X Hehighlevel (mostpositive)elowlevel (most negative)edon’tcare
Order Number DP8480AJorDP8480AN
SeeNS Package NumberJ16Aor N16A
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
